[codegen] legalize imul.I64 for 32-bit ISAs

Add a legalization that legalizes imul.I64 for 32-bit ISAs.

Refs: bnjbvr/cranelift-x86#4

cranelift-codegen/meta/src/shared/legalize.rs

@@ -114,6 +114,7 @@ pub(crate) fn define(insts: &InstructionGroup, imm: &Immediates) -> TransformGro
     let uextend = insts.by_name("uextend");
     let uload8 = insts.by_name("uload8");
     let uload16 = insts.by_name("uload16");
+    let umulhi = insts.by_name("umulhi");
     let ushr = insts.by_name("ushr");
     let ushr_imm = insts.by_name("ushr_imm");
     let urem = insts.by_name("urem");
@@ -272,6 +273,25 @@ pub(crate) fn define(insts: &InstructionGroup, imm: &Immediates) -> TransformGro
         ],
     );
 
+    // TODO(ryzokuken): explore the perf diff w/ x86_umulx and consider have a
+    // separate legalization for x86.
+    for &(ty, ty_half) in &[(I64, I32), (I128, I64)] {
+        narrow.legalize(
+            def!(a = imul.ty(x, y)),
+            vec![
+                def!((xl, xh) = isplit.ty(x)),
+                def!((yl, yh) = isplit.ty(y)),
+                def!(al = imul.ty_half(xl, yl)),
+                def!(a1 = imul.ty_half(xh, yl)),
+                def!(a2 = imul.ty_half(xl, yh)),
+                def!(a3 = umulhi.ty_half(xl, yl)),
+                def!(a4 = iadd.ty_half(a1, a2)),
+                def!(ah = iadd.ty_half(a4, a3)),
+                def!(a = iconcat.ty_half(al, ah)),
+            ],
+        );
+    }
+
     // Widen instructions with one input operand.
     for &op in &[bnot, popcnt] {
         for &int_ty in &[I8, I16] {

filetests/isa/x86/legalize-i128.clif

@@ -0,0 +1,21 @@
+; Test the legalization of i128 instructions on x86_64.
+test legalizer
+target x86_64 haswell
+
+; regex: V=v\d+
+
+function %imul(i128, i128) -> i128 {
+ebb0(v1: i128, v2: i128):
+    v10 = imul v1, v2
+    ; check: v1 = iconcat $(v1_lsb=$V), $(v1_msb=$V)
+    ; nextln: v2 = iconcat $(v2_lsb=$V), $(v2_msb=$V)
+    ; nextln: $(v10_lsb=$V) = imul $v1_lsb, $v2_lsb
+    ; nextln: $(v11=$V) = imul $v1_msb, $v2_lsb
+    ; nextln: $(v12=$V) = imul $v1_lsb, $v2_msb
+    ; nextln: $(v99=$V), $(v13=$V) = x86_umulx $v1_lsb, $v2_lsb
+    ; nextln: $(v14=$V) = iadd $v11, $v12
+    ; nextln: $(v10_msb=$V) = iadd $v14, $v13
+    ; nextln: v10 = iconcat $v10_lsb, $v10_msb
+    return v10
+}
+

filetests/isa/x86/legalize-i64.clif

@@ -25,3 +25,18 @@ ebb0(v1: i64, v2: i64):
     ; nextln: v10 = iconcat $v10_lsb, $v10_msb
     return v10
 }
+
+function %imul(i64, i64) -> i64 {
+ebb0(v1: i64, v2: i64):
+    v10 = imul v1, v2
+    ; check: v1 = iconcat $(v1_lsb=$V), $(v1_msb=$V)
+    ; nextln: v2 = iconcat $(v2_lsb=$V), $(v2_msb=$V)
+    ; nextln: $(v10_lsb=$V) = imul $v1_lsb, $v2_lsb
+    ; nextln: $(v11=$V) = imul $v1_msb, $v2_lsb
+    ; nextln: $(v12=$V) = imul $v1_lsb, $v2_msb
+    ; nextln: $(v99=$V), $(v13=$V) = x86_umulx $v1_lsb, $v2_lsb
+    ; nextln: $(v14=$V) = iadd $v11, $v12
+    ; nextln: $(v10_msb=$V) = iadd $v14, $v13
+    ; nextln: v10 = iconcat $v10_lsb, $v10_msb
+    return v10
+}