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CAD & Reliability Group

Works produced by the CAD & Reliability group of the Department of Control and Computer Engineering (DAUIN) of Politecnico di Torino

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The Electronic CAD & Reliability Group is a research group inside the Department of Control and Computer Engineering (DAUIN) of Politecnico di Torino. Its mission is to support, through techniques, tools, and services, the designer of electronic circuits and systems. The research conducted by the group spans the whole spectrum of classical computer-aided design topics, with particular emphasis on testing, fault tolerance, and validation of digital circuits and systems described at various levels of abstraction.

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  1. I99T I99T Public

    ITC'99 benchmarks developed in the CAD Group at Politecnico di Torino

    VHDL 45 17

  2. byron byron Public

    An evolutionary source-code fuzzer

    Jupyter Notebook 5 1

Repositories

Showing 10 of 15 repositories
  • byron Public

    An evolutionary source-code fuzzer

    cad-polito-it/byron’s past year of commit activity
    Jupyter Notebook 5 Apache-2.0 1 0 0 Updated Jul 22, 2024
  • cad-polito-it/SFIadvancedmodels’s past year of commit activity
    Python 0 0 0 0 Updated Jul 22, 2024
  • pulpino_ri5cy_stls Public

    Stuck-At Software Test Libraries for the pulpino-ri5cy SoC

    cad-polito-it/pulpino_ri5cy_stls’s past year of commit activity
    Assembly 3 Apache-2.0 0 0 0 Updated May 29, 2024
  • r4ves Public

    RiscV Environment for Simulation (R4VES) is a generic and modular framework that eases the grunt work required in order to perform pre/post-synthesis logic and fault simulation on RISC-V cores based on Model/QuestaSim and Z01X.

    cad-polito-it/r4ves’s past year of commit activity
    Verilog 1 Apache-2.0 1 0 0 Updated May 28, 2024
  • cad-polito-it/x-heep-tflite-cfoshw24’s past year of commit activity
    Python 0 1 0 0 Updated Apr 26, 2024
  • x-heep-femu-tflite-sdk Public Forked from esl-epfl/x-heep-femu-sdk

    X-HEEP-based FPGA EMUlation Platform (FEMU) Software Development Kit (SDK) with Tensorflow Lite for Microcontrollers support.

    cad-polito-it/x-heep-femu-tflite-sdk’s past year of commit activity
    C 0 9 0 0 Updated Apr 26, 2024
  • cad-polito-it/tflite-micro-x-heep’s past year of commit activity
    C++ 0 Apache-2.0 0 0 0 Updated Mar 2, 2024
  • .github Public
    cad-polito-it/.github’s past year of commit activity
    0 0 0 0 Updated Feb 26, 2024
  • cv32e40p_tftlab Public Forked from openhwgroup/cv32e40p

    CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

    cad-polito-it/cv32e40p_tftlab’s past year of commit activity
    SystemVerilog 1 411 0 0 Updated Jan 28, 2024
  • ase_riscv_gem5_sim Public

    RISCV Gem5 simulator flow for Architetture dei Sistemi di Elaborazione

    cad-polito-it/ase_riscv_gem5_sim’s past year of commit activity
    Python 7 GPL-2.0 1 1 0 Updated Nov 6, 2023

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