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pinctrl: add NXP S32 SoC family support
Add the pinctrl driver for NXP S32G SoC family. This driver is mainly based on NXP's downstream implementation on CodeAurora[1]. [1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/pinctrl/freescale?h=bsp34.0-5.10.120-rt Signed-off-by: Matthew Nunez <matthew.nunez@nxp.com> Signed-off-by: Phu Luu An <phu.luuan@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@nxp.com> Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com> Signed-off-by: Chester Lin <clin@suse.com>
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/* SPDX-License-Identifier: GPL-2.0-or-later | ||
* | ||
* S32 pinmux core definitions | ||
* | ||
* Copyright 2016-2020,2022 NXP | ||
* Copyright (C) 2012 Linaro Ltd. | ||
*/ | ||
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#ifndef __DRIVERS_PINCTRL_S32_H | ||
#define __DRIVERS_PINCTRL_S32_H | ||
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struct platform_device; | ||
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/** | ||
* struct s32_pin_group - describes an S32 pin group | ||
* @name: the name of this specific pin group | ||
* @npins: the number of pins in this group array, i.e. the number of | ||
* elements in .pins so we can iterate over that array | ||
* @pin_ids: an array of pin_ids in this group. | ||
* @@pin_sss: an array of source signal select configs paired with pin_ids. | ||
*/ | ||
struct s32_pin_group { | ||
const char *name; | ||
unsigned int npins; | ||
unsigned int *pin_ids; | ||
unsigned int *pin_sss; | ||
}; | ||
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/** | ||
* struct s32_pmx_func - describes S32 pinmux functions | ||
* @name: the name of this specific function | ||
* @groups: corresponding pin groups | ||
* @num_groups: the number of groups | ||
*/ | ||
struct s32_pmx_func { | ||
const char *name; | ||
const char **groups; | ||
unsigned int num_groups; | ||
}; | ||
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struct s32_pinctrl_soc_info { | ||
struct device *dev; | ||
const struct pinctrl_pin_desc *pins; | ||
unsigned int npins; | ||
struct s32_pin_group *groups; | ||
unsigned int ngroups; | ||
struct s32_pmx_func *functions; | ||
unsigned int nfunctions; | ||
unsigned int grp_index; | ||
unsigned int mem_regions; | ||
}; | ||
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#define S32_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) | ||
#define S32_MSCR_OFFSET (0x240) | ||
#define S32_PAD_CONFIG(idx) ((idx) * 4) | ||
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int s32_pinctrl_probe(struct platform_device *pdev, | ||
struct s32_pinctrl_soc_info *info); | ||
int s32_pinctrl_remove(struct platform_device *pdev); | ||
#ifdef CONFIG_PM_SLEEP | ||
int s32_pinctrl_resume(struct device *dev); | ||
int s32_pinctrl_suspend(struct device *dev); | ||
#endif | ||
#endif /* __DRIVERS_PINCTRL_S32_H */ |
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