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Update the uxSchedulerSuspended after prvCheckForRunStateChange #62

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@chinglee-iot chinglee-iot commented Jan 30, 2023

Description

  • Update the uxSchedulerSuspended after the prvCheckForRunStateChange to prevent race condition in fromISR APIs

Consider the following sequence:

  • Core A tries to suspend the scheduler and are requested to yield ( Task lock is held )
  • Core B enters the critical section From ISR ( ISR lock is held ) and reading the uxSchedulerSuspended

The original implementation is to update the uxSchedulerSuspended without ISR lock.
FromISR version API can still read the uxSchedulerSuspended when task is updating the variable.
The problem in xTaskRemoveFromEventList

  • After uxSchedulerSuspended is udpated to 0, the task can be put to the ready list directly.
  • Before uxSchedulerSuspended is updated to 0, the task will be put to the pending ready list and added back to the ready list when scheduler is resumed. However, if the task is requested to yield. The task in pending ready list will be blocked. This can be reproduced easily with proper delay.
            uxSchedulerSuspended = 0U;

            if( uxPrevCriticalNesting > 0U )
            {
                pxThisTCB->uxCriticalNesting = 0U;
                portRELEASE_ISR_LOCK();
                portRELEASE_TASK_LOCK();
            }
            else
            {
                /* uxPrevSchedulerSuspended must be 1 */
                portRELEASE_TASK_LOCK();
            }

The fix in ab074f5. This ensure that the uxSchedulerSuspended is always 1 in this scenario since portGET_ISR_LOCK ensure the order, which is the before case in previous section and is not expected.

                if( uxPrevCriticalNesting > 0U )
                {
                    portSET_CRITICAL_NESTING_COUNT( 0U );
                }
                else
                {
                    /* Adding proper delay here to increase the probability ISR get the lock 
                     * first to reproduce the problem. In that case, uxSchedulerSuspended is 1
                     * in the from ISR API. */
                    portGET_ISR_LOCK();
                    uxSchedulerSuspended = 0U;
                }

                portRELEASE_ISR_LOCK();
                portRELEASE_TASK_LOCK();

The suggested change in the PR. The uxSchedulerSuspended is update only when the task is not requested to yield. This prevent the race condition.

            /* uxSchedulerSuspended is increased after prvCheckForRunStateChange. The
             * purpose is to prevent fromISR API read the uxSchedulerSuspended if the
             * task is requested to yield. */
            if( uxSchedulerSuspended == 0U )
            {
                if( portGET_CRITICAL_NESTING_COUNT() == 0U )
                {
                    prvCheckForRunStateChange();
                }
                else
                {
                    mtCOVERAGE_TEST_MARKER();
                }
            }
            else
            {
                mtCOVERAGE_TEST_MARKER();
            }

            portGET_ISR_LOCK();

            /* The scheduler is suspended if uxSchedulerSuspended is non-zero. An increment
             * is used to allow calls to vTaskSuspendAll() to nest. */
            ++uxSchedulerSuspended;
            portRELEASE_ISR_LOCK();

            portCLEAR_INTERRUPT_MASK( ulState );

Test Steps

Related Issue

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

* Update the uxSchedulerSuspended after the prvCheckForRunStateChange to
  prevent race condition in fromISR APIs
@chinglee-iot chinglee-iot force-pushed the update-increase-uxSchedulerSuspended-after branch from 4db301c to 88674cb Compare January 30, 2023 03:50
chinglee-iot added a commit to chinglee-iot/FreeRTOS that referenced this pull request Feb 9, 2023
* Add critical section protection in timer ISR

Note that the following PR is still required to prevent race condition
chinglee-iot/FreeRTOS-Kernel#62
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chinglee-iot commented Apr 20, 2023

The problem ( the before case )
image

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chinglee-iot commented Apr 20, 2023

The suggested fix in this PR
image

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chinglee-iot commented Apr 21, 2023

This problem can be observed when running demos on XMOS AICORE.
Without this patch, there will be the following assertion

xrun: Program received signal ET_ECALL, Application exception.
      [Switching to tile[0] core[6]]
      prvSyncTask (pvParameters=0x8) at ../../../../Common/Minimal\EventGroupsDemo.c:304

      304               configASSERT( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS );
      Current language:  auto; currently minimal
make: *** [run] Error 125

@aggarg aggarg merged commit 096a582 into smp-dev-complete-merge-candidate-history Apr 24, 2023
6 of 19 checks passed
@aggarg aggarg deleted the update-increase-uxSchedulerSuspended-after branch April 24, 2023 06:14
ActoryOu pushed a commit to ActoryOu/FreeRTOS-Kernel that referenced this pull request Apr 25, 2023
* Update XMOS AICORE conflict (chinglee-iot#77)

* Define portBASE_TYPE in XMOS AICORE porting

* Update enter critical from ISR API

* Fix run time stats for SMP (chinglee-iot#76)

* Update get idle tasks stats

* Fix get task stats

* Fix missing configNUM_CORES

* Update the uxSchedulerSuspended after prvCheckForRunStateChange (chinglee-iot#62)

* Update the uxSchedulerSuspended after the prvCheckForRunStateChange to
  prevent race condition in fromISR APIs

* Fix SMP dev branch CI errors (chinglee-iot#79)

* Fix uncrustify

* Update lexicon

* Remove tailing space

* Ignore XMOS AICORE header check

* Fix ulTotalRunTime and ulTaskSwitchedInTime (chinglee-iot#80)

* SMP has multiple ulTotalRunTime and ulTaskSwitchedInTime

* Smp dev compelete merge main 20230424 (chinglee-iot#78)

* Fix array-bounds compiler warning on gcc11+ in list.h (FreeRTOS#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (FreeRTOS#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (FreeRTOS#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (FreeRTOS#613)

This is needed to be compatible with the refactoring done in this
PR - FreeRTOS/FreeRTOS#889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (FreeRTOS#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (FreeRTOS#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (FreeRTOS#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (FreeRTOS#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (FreeRTOS#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (FreeRTOS#627)

* Fix build failure introduced in PR FreeRTOS#597 (FreeRTOS#629)

The PR FreeRTOS#597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, FreeRTOS#320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, FreeRTOS#308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, FreeRTOS#308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, FreeRTOS#332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, FreeRTOS#308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, FreeRTOS#308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, FreeRTOS#332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, FreeRTOS#308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, FreeRTOS#308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, FreeRTOS#320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, FreeRTOS#308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, FreeRTOS#308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - FreeRTOS#628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (FreeRTOS#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (FreeRTOS#558)

* Using single name definition for libraries everywhere. (FreeRTOS#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (FreeRTOS#571)

* Removing compiler warnings for GNU and Clang. (FreeRTOS#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (FreeRTOS#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (FreeRTOS#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (FreeRTOS#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (FreeRTOS#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (FreeRTOS#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (FreeRTOS#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (FreeRTOS#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (FreeRTOS#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (FreeRTOS#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (FreeRTOS#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (FreeRTOS#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (FreeRTOS#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (FreeRTOS#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (FreeRTOS#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (FreeRTOS#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (FreeRTOS#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (FreeRTOS#651)

* fix conversion warning (FreeRTOS#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* ARMv7M: Adjust implemented priority bit assertions (FreeRTOS#665)

Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122

* Format portmacro.h in arm CM0 ports

* portable/ARM_CM0: Add xPortIsInsideInterrupt

Add missing xPortIsInsideInterrupt function to Cortex-M0 port.

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* Fix for c90 compiler

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
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