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Converted pcbpricing to script entrypoint.
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chintal committed Jan 17, 2016
1 parent 82cc4cc commit c353402
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Showing 3 changed files with 111 additions and 13 deletions.
1 change: 1 addition & 0 deletions setup.py
Expand Up @@ -83,6 +83,7 @@ def read(fname):
'tendril-production = tendril.scripts.production:entry_point',
'tendril-genvmap = tendril.scripts.genvmaps:main',
'tendril-genvmapaudit = tendril.scripts.genvmapaudits:main',
'tendril-genpcbpricing = tendril.scripts.genpcbpricing:main',
]


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109 changes: 102 additions & 7 deletions tendril/scripts/genpcbpricing.py
Expand Up @@ -19,19 +19,114 @@
See the COPYING, README, and INSTALL files for more information
"""

import os
import argparse

from tendril.entityhub import projects
from tendril.sourcing import csil

from tendril.gedaif.conffile import NoGedaProjectException
from tendril.gedaif import conffile

from tendril.utils.config import PROJECTS_ROOT
from tendril.utils.fsutils import in_directory
from tendril.utils import log
logger = log.get_logger("genpcbpricing", log.DEFAULT)


def regenerate_all(force=False, lazy=False, dry_run=False):
for project in projects.pcbs:
if dry_run:
conffile.ConfigsFile(projects.pcbs[project])
logger.info("Will check " + projects.pcbs[project])
else:
logger.info("Checking " + projects.pcbs[project])
csil.generate_pcb_pricing(projects.pcbs[project],
forceregen=force, noregen=lazy)

def generate():
for project in projects.projects:
csil.generate_pcb_pricing(projects.projects[project])

def main():
parser = argparse.ArgumentParser(
description='(Re-)Generate CSIL PCB Pricing Information.',
prog='tendril-genpcbpricing'
)
parser.add_argument(
'projfolders', metavar='PATH', type=str, nargs='*',
help='gEDA PCB Project Folder(s), ignored for --all'
)
parser.add_argument(
'--force', '-f', action='store_true', default=False,
help='Regenerate pricing even if it seems to be up-to-date'
)
parser.add_argument(
'--lazy', '-l', action='store_true', default=False,
help="Don't regenerate pricing if it exists, even if it "
"seems to be out-of-date"
)
parser.add_argument(
'--all', '-a', action='store_true', default=False,
help='Regenerate pricing for all projects'
)
parser.add_argument(
'--recurse', '-r', action='store_true', default=False,
help='Recursively search for projects under each provided folder'
)
parser.add_argument(
'--dry-run', '-n', action='store_true', default=False,
help="Dry run only. Don't do anything which can change the filesystem"
)

def flushpcbpricing():
for projectf in projects.projects:
csil.flush_pcb_pricing(projects.projects[projectf])
args = parser.parse_args()
force = args.force
lazy = args.lazy
if args.all:
regenerate_all(force=force, lazy=lazy, dry_run=args.dry_run)
else:
if not len(args.projfolders):
parser.print_help()
for projfolder in args.projfolders:
if not os.path.isabs(projfolder):
projfolder = os.path.join(os.getcwd(), projfolder)
projfolder = os.path.normpath(projfolder)
if not in_directory(projfolder, PROJECTS_ROOT):
logger.error(
'Provided directory does not seem to be under the '
'tendril PROJECTS_ROOT. Skipping ' + projfolder
)
continue
targets = [projfolder]
if args.recurse:
lprojects, lpcbs, lcards, lcard_reporoot = \
projects.get_projects(projfolder)
targets.extend([lpcbs[x] for x in lpcbs.keys()])
for target in targets:
try:
if args.dry_run is False:
csil.generate_pcb_pricing(
target, forceregen=force, noregen=lazy
)
logger.info("Checked " + target)
else:
conffile.ConfigsFile(target)
logger.info("Will check " + target)
except NoGedaProjectException:
# Make a guess.
if os.path.split(target)[1] == 'configs.yaml':
target == os.path.split(target)[0]
if os.path.split(target)[1] == 'schematic':
target == os.path.split(target)[0]
try:
if args.dry_run is False:
csil.generate_pcb_pricing(
target, forceregen=force, noregen=lazy
)
logger.info("Checked " + target)
else:
conffile.ConfigsFile(target)
logger.info("Will check " + target)
except NoGedaProjectException:
logger.error("No gEDA Project found at " + target)


if __name__ == '__main__':
generate()
main()
14 changes: 8 additions & 6 deletions tendril/sourcing/csil.py
Expand Up @@ -486,12 +486,14 @@ def generate_pcb_pricing(projfolder, noregen=True, forceregen=False):
'pcb', 'sourcing.yaml')

if noregen is True:
if forceregen is False:
pcb_mtime = fsutils.get_file_mtime(os.path.join(gpf.configsfile.projectfolder, 'pcb', gpf.pcbfile + '.pcb')) # noqa
outf_mtime = fsutils.get_file_mtime(pricingfp)
if outf_mtime is not None and outf_mtime > pcb_mtime:
logger.info('Skipping up-to-date ' + pricingfp)
return pricingfp
if os.path.exists(pricingfp):
return pricingfp
if forceregen is False:
pcb_mtime = fsutils.get_file_mtime(os.path.join(gpf.configsfile.projectfolder, 'pcb', gpf.pcbfile + '.pcb')) # noqa
outf_mtime = fsutils.get_file_mtime(pricingfp)
if outf_mtime is not None and outf_mtime > pcb_mtime:
logger.info('Skipping up-to-date ' + pricingfp)
return pricingfp
logger.info('Generating PCB Pricing for ' + pricingfp)

pcbparams['qty'] = range(searchparams['qty'])
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