Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Read access stops when read/write access is repeated #59

Open
yafuru0 opened this issue Dec 26, 2022 · 2 comments
Open

Read access stops when read/write access is repeated #59

yafuru0 opened this issue Dec 26, 2022 · 2 comments

Comments

@yafuru0
Copy link

yafuru0 commented Dec 26, 2022

Read access stops when read/write access is repeated.
Run the following program.


.text
.align 4

.global acctest

//
//I=====================================================
//I Access test for chattering access problem
//I=====================================================
//I void acctest(unsigned int adr, unsigned int in);
acctest:
csrrsi a2, mstatus, 0x08
lw a3, 0(a0)
sw a3, 0(a1)
csrrw zero, mstatus, a2
jalr zero, ra, 0 /
ret */

.end

Read accesses stop, but write accesses continue.
I am running a simulation in VCS.

@olofk
Copy link
Collaborator

olofk commented Dec 26, 2022

I don't have access to vcs, but running in Verilator I see continuous activity on both writes and reads.

Do you get the same behavior if you initialize the a0, a1 and a2 before the test? In your code they are uninitialized and could contain any value. I wonder if this might lead to x propagation in your simulation

@yafuru0
Copy link
Author

yafuru0 commented Dec 27, 2022

The memory being accessed is the memory installed in the LSU (AXI Bus).
These memories are cleared to 0 at initialization.
So x is not propagating.
a0, a1, and a3 are initialized during initialization.

ICCM/DCCM are similarly cleared to 0. (i don't use it)

After repeating read/write more than 100 times (?),A problem will occur.

Perhaps, there is a possibility that an interrupt has occurred, so the operation may become strange at that timing.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants