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RocketCore.fir
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RocketCore.fir
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circuit RocketCore :
module RocketCore :
input clock : Clock
input reset : UInt<1>
output io : {flip interrupts : {debug : UInt<1>, mtip : UInt<1>, msip : UInt<1>, meip : UInt<1>, seip : UInt<1>}, flip hartid : UInt<64>, imem : {req : {valid : UInt<1>, bits : {pc : UInt<40>, speculative : UInt<1>}}, flip resp : {flip ready : UInt<1>, valid : UInt<1>, bits : {btb : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<2>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<40>, data : UInt<32>, mask : UInt<2>, xcpt_if : UInt<1>, replay : UInt<1>}}, btb_update : {valid : UInt<1>, bits : {prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<2>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<39>, target : UInt<39>, taken : UInt<1>, isValid : UInt<1>, isJump : UInt<1>, isReturn : UInt<1>, br_pc : UInt<39>}}, bht_update : {valid : UInt<1>, bits : {prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<2>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<39>, taken : UInt<1>, mispredict : UInt<1>}}, ras_update : {valid : UInt<1>, bits : {isCall : UInt<1>, isReturn : UInt<1>, returnAddr : UInt<39>, prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<2>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}}}, flush_icache : UInt<1>, flush_tlb : UInt<1>, flip npc : UInt<40>, flip acquire : UInt<1>}, dmem : {req : {flip ready : UInt<1>, valid : UInt<1>, bits : {addr : UInt<40>, tag : UInt<7>, cmd : UInt<5>, typ : UInt<3>, phys : UInt<1>, data : UInt<64>}}, s1_kill : UInt<1>, s1_data : UInt<64>, flip s2_nack : UInt<1>, flip acquire : UInt<1>, flip release : UInt<1>, flip resp : {valid : UInt<1>, bits : {addr : UInt<40>, tag : UInt<7>, cmd : UInt<5>, typ : UInt<3>, data : UInt<64>, replay : UInt<1>, has_data : UInt<1>, data_word_bypass : UInt<64>, store_data : UInt<64>}}, flip replay_next : UInt<1>, flip xcpt : {ma : {ld : UInt<1>, st : UInt<1>}, pf : {ld : UInt<1>, st : UInt<1>}}, invalidate_lr : UInt<1>, flip ordered : UInt<1>}, flip ptw : {flip ptbr : {mode : UInt<4>, asid : UInt<16>, ppn : UInt<44>}, flip invalidate : UInt<1>, flip status : {debug : UInt<1>, isa : UInt<32>, prv : UInt<2>, sd : UInt<1>, zero2 : UInt<27>, sxl : UInt<2>, uxl : UInt<2>, sd_rv32 : UInt<1>, zero1 : UInt<8>, tsr : UInt<1>, tw : UInt<1>, tvm : UInt<1>, mxr : UInt<1>, pum : UInt<1>, mprv : UInt<1>, xs : UInt<2>, fs : UInt<2>, mpp : UInt<2>, hpp : UInt<2>, spp : UInt<1>, mpie : UInt<1>, hpie : UInt<1>, spie : UInt<1>, upie : UInt<1>, mie : UInt<1>, hie : UInt<1>, sie : UInt<1>, uie : UInt<1>}}, flip fpu : {flip inst : UInt<32>, flip fromint_data : UInt<64>, flip fcsr_rm : UInt<3>, fcsr_flags : {valid : UInt<1>, bits : UInt<5>}, store_data : UInt<64>, toint_data : UInt<64>, flip dmem_resp_val : UInt<1>, flip dmem_resp_type : UInt<3>, flip dmem_resp_tag : UInt<5>, flip dmem_resp_data : UInt<64>, flip valid : UInt<1>, fcsr_rdy : UInt<1>, nack_mem : UInt<1>, illegal_rm : UInt<1>, flip killx : UInt<1>, flip killm : UInt<1>, dec : {cmd : UInt<5>, ldst : UInt<1>, wen : UInt<1>, ren1 : UInt<1>, ren2 : UInt<1>, ren3 : UInt<1>, swap12 : UInt<1>, swap23 : UInt<1>, single : UInt<1>, fromint : UInt<1>, toint : UInt<1>, fastpipe : UInt<1>, fma : UInt<1>, div : UInt<1>, sqrt : UInt<1>, wflags : UInt<1>}, sboard_set : UInt<1>, sboard_clr : UInt<1>, sboard_clra : UInt<5>}, flip rocc : {flip cmd : {flip ready : UInt<1>, valid : UInt<1>, bits : {inst : {funct : UInt<7>, rs2 : UInt<5>, rs1 : UInt<5>, xd : UInt<1>, xs1 : UInt<1>, xs2 : UInt<1>, rd : UInt<5>, opcode : UInt<7>}, rs1 : UInt<64>, rs2 : UInt<64>, status : {debug : UInt<1>, isa : UInt<32>, prv : UInt<2>, sd : UInt<1>, zero2 : UInt<27>, sxl : UInt<2>, uxl : UInt<2>, sd_rv32 : UInt<1>, zero1 : UInt<8>, tsr : UInt<1>, tw : UInt<1>, tvm : UInt<1>, mxr : UInt<1>, pum : UInt<1>, mprv : UInt<1>, xs : UInt<2>, fs : UInt<2>, mpp : UInt<2>, hpp : UInt<2>, spp : UInt<1>, mpie : UInt<1>, hpie : UInt<1>, spie : UInt<1>, upie : UInt<1>, mie : UInt<1>, hie : UInt<1>, sie : UInt<1>, uie : UInt<1>}}}, resp : {flip ready : UInt<1>, valid : UInt<1>, bits : {rd : UInt<5>, data : UInt<64>}}, mem : {req : {flip ready : UInt<1>, valid : UInt<1>, bits : {addr : UInt<40>, tag : UInt<7>, cmd : UInt<5>, typ : UInt<3>, phys : UInt<1>, data : UInt<64>}}, s1_kill : UInt<1>, s1_data : UInt<64>, flip s2_nack : UInt<1>, flip acquire : UInt<1>, flip release : UInt<1>, flip resp : {valid : UInt<1>, bits : {addr : UInt<40>, tag : UInt<7>, cmd : UInt<5>, typ : UInt<3>, data : UInt<64>, replay : UInt<1>, has_data : UInt<1>, data_word_bypass : UInt<64>, store_data : UInt<64>}}, flip replay_next : UInt<1>, flip xcpt : {ma : {ld : UInt<1>, st : UInt<1>}, pf : {ld : UInt<1>, st : UInt<1>}}, invalidate_lr : UInt<1>, flip ordered : UInt<1>}, busy : UInt<1>, interrupt : UInt<1>, flip exception : UInt<1>}}
io is invalid
io is invalid
reg ex_ctrl : {legal : UInt<1>, fp : UInt<1>, rocc : UInt<1>, branch : UInt<1>, jal : UInt<1>, jalr : UInt<1>, rxs2 : UInt<1>, rxs1 : UInt<1>, sel_alu2 : UInt<2>, sel_alu1 : UInt<2>, sel_imm : UInt<3>, alu_dw : UInt<1>, alu_fn : UInt<4>, mem : UInt<1>, mem_cmd : UInt<5>, mem_type : UInt<3>, rfs1 : UInt<1>, rfs2 : UInt<1>, rfs3 : UInt<1>, wfd : UInt<1>, div : UInt<1>, wxd : UInt<1>, csr : UInt<3>, fence_i : UInt<1>, fence : UInt<1>, amo : UInt<1>, dp : UInt<1>}, clock @[Rocket.scala 115:20]
reg mem_ctrl : {legal : UInt<1>, fp : UInt<1>, rocc : UInt<1>, branch : UInt<1>, jal : UInt<1>, jalr : UInt<1>, rxs2 : UInt<1>, rxs1 : UInt<1>, sel_alu2 : UInt<2>, sel_alu1 : UInt<2>, sel_imm : UInt<3>, alu_dw : UInt<1>, alu_fn : UInt<4>, mem : UInt<1>, mem_cmd : UInt<5>, mem_type : UInt<3>, rfs1 : UInt<1>, rfs2 : UInt<1>, rfs3 : UInt<1>, wfd : UInt<1>, div : UInt<1>, wxd : UInt<1>, csr : UInt<3>, fence_i : UInt<1>, fence : UInt<1>, amo : UInt<1>, dp : UInt<1>}, clock @[Rocket.scala 116:21]
reg wb_ctrl : {legal : UInt<1>, fp : UInt<1>, rocc : UInt<1>, branch : UInt<1>, jal : UInt<1>, jalr : UInt<1>, rxs2 : UInt<1>, rxs1 : UInt<1>, sel_alu2 : UInt<2>, sel_alu1 : UInt<2>, sel_imm : UInt<3>, alu_dw : UInt<1>, alu_fn : UInt<4>, mem : UInt<1>, mem_cmd : UInt<5>, mem_type : UInt<3>, rfs1 : UInt<1>, rfs2 : UInt<1>, rfs3 : UInt<1>, wfd : UInt<1>, div : UInt<1>, wxd : UInt<1>, csr : UInt<3>, fence_i : UInt<1>, fence : UInt<1>, amo : UInt<1>, dp : UInt<1>}, clock @[Rocket.scala 117:20]
reg ex_reg_xcpt_interrupt : UInt<1>, clock @[Rocket.scala 119:35]
reg ex_reg_valid : UInt<1>, clock @[Rocket.scala 120:35]
reg ex_reg_rvc : UInt<1>, clock @[Rocket.scala 121:35]
reg ex_reg_btb_hit : UInt<1>, clock @[Rocket.scala 122:35]
reg ex_reg_btb_resp : {taken : UInt<1>, mask : UInt<2>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}, clock @[Rocket.scala 123:35]
reg ex_reg_xcpt : UInt<1>, clock @[Rocket.scala 124:35]
reg ex_reg_flush_pipe : UInt<1>, clock @[Rocket.scala 125:35]
reg ex_reg_load_use : UInt<1>, clock @[Rocket.scala 126:35]
reg ex_cause : UInt, clock @[Rocket.scala 127:35]
reg ex_reg_replay : UInt<1>, clock @[Rocket.scala 128:26]
reg ex_reg_pc : UInt, clock @[Rocket.scala 129:22]
reg ex_reg_inst : UInt, clock @[Rocket.scala 130:24]
reg mem_reg_xcpt_interrupt : UInt<1>, clock @[Rocket.scala 132:36]
reg mem_reg_valid : UInt<1>, clock @[Rocket.scala 133:36]
reg mem_reg_rvc : UInt<1>, clock @[Rocket.scala 134:36]
reg mem_reg_btb_hit : UInt<1>, clock @[Rocket.scala 135:36]
reg mem_reg_btb_resp : {taken : UInt<1>, mask : UInt<2>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}, clock @[Rocket.scala 136:36]
reg mem_reg_xcpt : UInt<1>, clock @[Rocket.scala 137:36]
reg mem_reg_replay : UInt<1>, clock @[Rocket.scala 138:36]
reg mem_reg_flush_pipe : UInt<1>, clock @[Rocket.scala 139:36]
reg mem_reg_cause : UInt, clock @[Rocket.scala 140:36]
reg mem_reg_slow_bypass : UInt<1>, clock @[Rocket.scala 141:36]
reg mem_reg_load : UInt<1>, clock @[Rocket.scala 142:36]
reg mem_reg_store : UInt<1>, clock @[Rocket.scala 143:36]
reg mem_reg_pc : UInt, clock @[Rocket.scala 144:23]
reg mem_reg_inst : UInt, clock @[Rocket.scala 145:25]
reg mem_reg_wdata : UInt, clock @[Rocket.scala 146:26]
reg mem_reg_rs2 : UInt, clock @[Rocket.scala 147:24]
wire take_pc_mem : UInt<1> @[Rocket.scala 148:25]
take_pc_mem is invalid @[Rocket.scala 148:25]
reg wb_reg_valid : UInt<1>, clock @[Rocket.scala 150:35]
reg wb_reg_xcpt : UInt<1>, clock @[Rocket.scala 151:35]
reg wb_reg_replay : UInt<1>, clock @[Rocket.scala 152:35]
reg wb_reg_cause : UInt, clock @[Rocket.scala 153:35]
reg wb_reg_pc : UInt, clock @[Rocket.scala 154:22]
reg wb_reg_inst : UInt, clock @[Rocket.scala 155:24]
reg wb_reg_wdata : UInt, clock @[Rocket.scala 156:25]
reg wb_reg_rs2 : UInt, clock @[Rocket.scala 157:23]
wire take_pc_wb : UInt<1> @[Rocket.scala 158:24]
take_pc_wb is invalid @[Rocket.scala 158:24]
wire take_pc_id : UInt<1> @[Rocket.scala 160:24]
take_pc_id is invalid @[Rocket.scala 160:24]
node take_pc_mem_wb = or(take_pc_wb, take_pc_mem) @[Rocket.scala 161:35]
node take_pc = or(take_pc_mem_wb, take_pc_id) @[Rocket.scala 162:32]
inst ibuf of IBuf @[Rocket.scala 165:20]
ibuf.io is invalid
ibuf.clock <= clock
ibuf.reset <= reset
ibuf.io.imem <- io.imem.resp @[Rocket.scala 168:16]
ibuf.io.kill <= take_pc @[Rocket.scala 169:16]
wire id_ctrl : {legal : UInt<1>, fp : UInt<1>, rocc : UInt<1>, branch : UInt<1>, jal : UInt<1>, jalr : UInt<1>, rxs2 : UInt<1>, rxs1 : UInt<1>, sel_alu2 : UInt<2>, sel_alu1 : UInt<2>, sel_imm : UInt<3>, alu_dw : UInt<1>, alu_fn : UInt<4>, mem : UInt<1>, mem_cmd : UInt<5>, mem_type : UInt<3>, rfs1 : UInt<1>, rfs2 : UInt<1>, rfs3 : UInt<1>, wfd : UInt<1>, div : UInt<1>, wxd : UInt<1>, csr : UInt<3>, fence_i : UInt<1>, fence : UInt<1>, amo : UInt<1>, dp : UInt<1>} @[Rocket.scala 172:21]
id_ctrl is invalid @[Rocket.scala 172:21]
node _T_2603 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0207f")) @[Decode.scala 13:65]
node _T_2605 = eq(_T_2603, UInt<32>("h03")) @[Decode.scala 13:121]
node _T_2607 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0106f")) @[Decode.scala 13:65]
node _T_2609 = eq(_T_2607, UInt<32>("h03")) @[Decode.scala 13:121]
node _T_2611 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0607f")) @[Decode.scala 13:65]
node _T_2613 = eq(_T_2611, UInt<32>("h0f")) @[Decode.scala 13:121]
node _T_2615 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07077")) @[Decode.scala 13:65]
node _T_2617 = eq(_T_2615, UInt<32>("h013")) @[Decode.scala 13:121]
node _T_2619 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h05f")) @[Decode.scala 13:65]
node _T_2621 = eq(_T_2619, UInt<32>("h017")) @[Decode.scala 13:121]
node _T_2623 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fc00007f")) @[Decode.scala 13:65]
node _T_2625 = eq(_T_2623, UInt<32>("h033")) @[Decode.scala 13:121]
node _T_2627 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0be007077")) @[Decode.scala 13:65]
node _T_2629 = eq(_T_2627, UInt<32>("h033")) @[Decode.scala 13:121]
node _T_2631 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04000073")) @[Decode.scala 13:65]
node _T_2633 = eq(_T_2631, UInt<32>("h043")) @[Decode.scala 13:121]
node _T_2635 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0e400007f")) @[Decode.scala 13:65]
node _T_2637 = eq(_T_2635, UInt<32>("h053")) @[Decode.scala 13:121]
node _T_2639 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0707b")) @[Decode.scala 13:65]
node _T_2641 = eq(_T_2639, UInt<32>("h063")) @[Decode.scala 13:121]
node _T_2643 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07f")) @[Decode.scala 13:65]
node _T_2645 = eq(_T_2643, UInt<32>("h06f")) @[Decode.scala 13:121]
node _T_2647 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0ffefffff")) @[Decode.scala 13:65]
node _T_2649 = eq(_T_2647, UInt<32>("h073")) @[Decode.scala 13:121]
node _T_2651 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fc00305f")) @[Decode.scala 13:65]
node _T_2653 = eq(_T_2651, UInt<32>("h01013")) @[Decode.scala 13:121]
node _T_2655 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fe00305f")) @[Decode.scala 13:65]
node _T_2657 = eq(_T_2655, UInt<32>("h0101b")) @[Decode.scala 13:121]
node _T_2659 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0605b")) @[Decode.scala 13:65]
node _T_2661 = eq(_T_2659, UInt<32>("h02003")) @[Decode.scala 13:121]
node _T_2663 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0207f")) @[Decode.scala 13:65]
node _T_2665 = eq(_T_2663, UInt<32>("h02013")) @[Decode.scala 13:121]
node _T_2667 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h01800607f")) @[Decode.scala 13:65]
node _T_2669 = eq(_T_2667, UInt<32>("h0202f")) @[Decode.scala 13:121]
node _T_2671 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0207f")) @[Decode.scala 13:65]
node _T_2673 = eq(_T_2671, UInt<32>("h02073")) @[Decode.scala 13:121]
node _T_2675 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0bc00707f")) @[Decode.scala 13:65]
node _T_2677 = eq(_T_2675, UInt<32>("h05013")) @[Decode.scala 13:121]
node _T_2679 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0be00705f")) @[Decode.scala 13:65]
node _T_2681 = eq(_T_2679, UInt<32>("h0501b")) @[Decode.scala 13:121]
node _T_2683 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0be007077")) @[Decode.scala 13:65]
node _T_2685 = eq(_T_2683, UInt<32>("h05033")) @[Decode.scala 13:121]
node _T_2687 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fe004077")) @[Decode.scala 13:65]
node _T_2689 = eq(_T_2687, UInt<32>("h02004033")) @[Decode.scala 13:121]
node _T_2691 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0e800607f")) @[Decode.scala 13:65]
node _T_2693 = eq(_T_2691, UInt<32>("h0800202f")) @[Decode.scala 13:121]
node _T_2695 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0f9f0607f")) @[Decode.scala 13:65]
node _T_2697 = eq(_T_2695, UInt<32>("h01000202f")) @[Decode.scala 13:121]
node _T_2699 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0dfffffff")) @[Decode.scala 13:65]
node _T_2701 = eq(_T_2699, UInt<32>("h010200073")) @[Decode.scala 13:121]
node _T_2703 = eq(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h010500073")) @[Decode.scala 13:121]
node _T_2705 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fe007fff")) @[Decode.scala 13:65]
node _T_2707 = eq(_T_2705, UInt<32>("h012000073")) @[Decode.scala 13:121]
node _T_2709 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0f400607f")) @[Decode.scala 13:65]
node _T_2711 = eq(_T_2709, UInt<32>("h020000053")) @[Decode.scala 13:121]
node _T_2713 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07c00607f")) @[Decode.scala 13:65]
node _T_2715 = eq(_T_2713, UInt<32>("h020000053")) @[Decode.scala 13:121]
node _T_2717 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07c00507f")) @[Decode.scala 13:65]
node _T_2719 = eq(_T_2717, UInt<32>("h020000053")) @[Decode.scala 13:121]
node _T_2721 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07ff0007f")) @[Decode.scala 13:65]
node _T_2723 = eq(_T_2721, UInt<32>("h040100053")) @[Decode.scala 13:121]
node _T_2725 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07ff0007f")) @[Decode.scala 13:65]
node _T_2727 = eq(_T_2725, UInt<32>("h042000053")) @[Decode.scala 13:121]
node _T_2729 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fdf0007f")) @[Decode.scala 13:65]
node _T_2731 = eq(_T_2729, UInt<32>("h058000053")) @[Decode.scala 13:121]
node _T_2733 = eq(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07b200073")) @[Decode.scala 13:121]
node _T_2735 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0edc0007f")) @[Decode.scala 13:65]
node _T_2737 = eq(_T_2735, UInt<32>("h0c0000053")) @[Decode.scala 13:121]
node _T_2739 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fdf0607f")) @[Decode.scala 13:65]
node _T_2741 = eq(_T_2739, UInt<32>("h0e0000053")) @[Decode.scala 13:121]
node _T_2743 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0edf0707f")) @[Decode.scala 13:65]
node _T_2745 = eq(_T_2743, UInt<32>("h0e0000053")) @[Decode.scala 13:121]
node _T_2747 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0603f")) @[Decode.scala 13:65]
node _T_2749 = eq(_T_2747, UInt<32>("h023")) @[Decode.scala 13:121]
node _T_2751 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0306f")) @[Decode.scala 13:65]
node _T_2753 = eq(_T_2751, UInt<32>("h01063")) @[Decode.scala 13:121]
node _T_2755 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0407f")) @[Decode.scala 13:65]
node _T_2757 = eq(_T_2755, UInt<32>("h04063")) @[Decode.scala 13:121]
node _T_2759 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0fc007077")) @[Decode.scala 13:65]
node _T_2761 = eq(_T_2759, UInt<32>("h033")) @[Decode.scala 13:121]
node _T_2763 = or(UInt<1>("h00"), _T_2605) @[Decode.scala 14:30]
node _T_2764 = or(_T_2763, _T_2609) @[Decode.scala 14:30]
node _T_2765 = or(_T_2764, _T_2613) @[Decode.scala 14:30]
node _T_2766 = or(_T_2765, _T_2617) @[Decode.scala 14:30]
node _T_2767 = or(_T_2766, _T_2621) @[Decode.scala 14:30]
node _T_2768 = or(_T_2767, _T_2625) @[Decode.scala 14:30]
node _T_2769 = or(_T_2768, _T_2629) @[Decode.scala 14:30]
node _T_2770 = or(_T_2769, _T_2633) @[Decode.scala 14:30]
node _T_2771 = or(_T_2770, _T_2637) @[Decode.scala 14:30]
node _T_2772 = or(_T_2771, _T_2641) @[Decode.scala 14:30]
node _T_2773 = or(_T_2772, _T_2645) @[Decode.scala 14:30]
node _T_2774 = or(_T_2773, _T_2649) @[Decode.scala 14:30]
node _T_2775 = or(_T_2774, _T_2653) @[Decode.scala 14:30]
node _T_2776 = or(_T_2775, _T_2657) @[Decode.scala 14:30]
node _T_2777 = or(_T_2776, _T_2661) @[Decode.scala 14:30]
node _T_2778 = or(_T_2777, _T_2665) @[Decode.scala 14:30]
node _T_2779 = or(_T_2778, _T_2669) @[Decode.scala 14:30]
node _T_2780 = or(_T_2779, _T_2673) @[Decode.scala 14:30]
node _T_2781 = or(_T_2780, _T_2677) @[Decode.scala 14:30]
node _T_2782 = or(_T_2781, _T_2681) @[Decode.scala 14:30]
node _T_2783 = or(_T_2782, _T_2685) @[Decode.scala 14:30]
node _T_2784 = or(_T_2783, _T_2689) @[Decode.scala 14:30]
node _T_2785 = or(_T_2784, _T_2693) @[Decode.scala 14:30]
node _T_2786 = or(_T_2785, _T_2697) @[Decode.scala 14:30]
node _T_2787 = or(_T_2786, _T_2701) @[Decode.scala 14:30]
node _T_2788 = or(_T_2787, _T_2703) @[Decode.scala 14:30]
node _T_2789 = or(_T_2788, _T_2707) @[Decode.scala 14:30]
node _T_2790 = or(_T_2789, _T_2711) @[Decode.scala 14:30]
node _T_2791 = or(_T_2790, _T_2715) @[Decode.scala 14:30]
node _T_2792 = or(_T_2791, _T_2719) @[Decode.scala 14:30]
node _T_2793 = or(_T_2792, _T_2723) @[Decode.scala 14:30]
node _T_2794 = or(_T_2793, _T_2727) @[Decode.scala 14:30]
node _T_2795 = or(_T_2794, _T_2731) @[Decode.scala 14:30]
node _T_2796 = or(_T_2795, _T_2733) @[Decode.scala 14:30]
node _T_2797 = or(_T_2796, _T_2737) @[Decode.scala 14:30]
node _T_2798 = or(_T_2797, _T_2741) @[Decode.scala 14:30]
node _T_2799 = or(_T_2798, _T_2745) @[Decode.scala 14:30]
node _T_2800 = or(_T_2799, _T_2749) @[Decode.scala 14:30]
node _T_2801 = or(_T_2800, _T_2753) @[Decode.scala 14:30]
node _T_2802 = or(_T_2801, _T_2757) @[Decode.scala 14:30]
node _T_2803 = or(_T_2802, _T_2761) @[Decode.scala 14:30]
node _T_2805 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h05c")) @[Decode.scala 13:65]
node _T_2807 = eq(_T_2805, UInt<32>("h04")) @[Decode.scala 13:121]
node _T_2809 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h060")) @[Decode.scala 13:65]
node _T_2811 = eq(_T_2809, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_2813 = or(UInt<1>("h00"), _T_2807) @[Decode.scala 14:30]
node _T_2814 = or(_T_2813, _T_2811) @[Decode.scala 14:30]
node _T_2817 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h074")) @[Decode.scala 13:65]
node _T_2819 = eq(_T_2817, UInt<32>("h060")) @[Decode.scala 13:121]
node _T_2821 = or(UInt<1>("h00"), _T_2819) @[Decode.scala 14:30]
node _T_2823 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h068")) @[Decode.scala 13:65]
node _T_2825 = eq(_T_2823, UInt<32>("h068")) @[Decode.scala 13:121]
node _T_2827 = or(UInt<1>("h00"), _T_2825) @[Decode.scala 14:30]
node _T_2829 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0203c")) @[Decode.scala 13:65]
node _T_2831 = eq(_T_2829, UInt<32>("h024")) @[Decode.scala 13:121]
node _T_2833 = or(UInt<1>("h00"), _T_2831) @[Decode.scala 14:30]
node _T_2835 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h064")) @[Decode.scala 13:65]
node _T_2837 = eq(_T_2835, UInt<32>("h020")) @[Decode.scala 13:121]
node _T_2839 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h034")) @[Decode.scala 13:65]
node _T_2841 = eq(_T_2839, UInt<32>("h020")) @[Decode.scala 13:121]
node _T_2843 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02048")) @[Decode.scala 13:65]
node _T_2845 = eq(_T_2843, UInt<32>("h02008")) @[Decode.scala 13:121]
node _T_2847 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h042003024")) @[Decode.scala 13:65]
node _T_2849 = eq(_T_2847, UInt<32>("h02000020")) @[Decode.scala 13:121]
node _T_2851 = or(UInt<1>("h00"), _T_2837) @[Decode.scala 14:30]
node _T_2852 = or(_T_2851, _T_2841) @[Decode.scala 14:30]
node _T_2853 = or(_T_2852, _T_2845) @[Decode.scala 14:30]
node _T_2854 = or(_T_2853, _T_2849) @[Decode.scala 14:30]
node _T_2856 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h044")) @[Decode.scala 13:65]
node _T_2858 = eq(_T_2856, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2860 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04024")) @[Decode.scala 13:65]
node _T_2862 = eq(_T_2860, UInt<32>("h020")) @[Decode.scala 13:121]
node _T_2864 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h038")) @[Decode.scala 13:65]
node _T_2866 = eq(_T_2864, UInt<32>("h020")) @[Decode.scala 13:121]
node _T_2868 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02050")) @[Decode.scala 13:65]
node _T_2870 = eq(_T_2868, UInt<32>("h02000")) @[Decode.scala 13:121]
node _T_2872 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h090000034")) @[Decode.scala 13:65]
node _T_2874 = eq(_T_2872, UInt<32>("h090000010")) @[Decode.scala 13:121]
node _T_2876 = or(UInt<1>("h00"), _T_2858) @[Decode.scala 14:30]
node _T_2877 = or(_T_2876, _T_2862) @[Decode.scala 14:30]
node _T_2878 = or(_T_2877, _T_2866) @[Decode.scala 14:30]
node _T_2879 = or(_T_2878, _T_2870) @[Decode.scala 14:30]
node _T_2880 = or(_T_2879, _T_2874) @[Decode.scala 14:30]
node _T_2882 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h058")) @[Decode.scala 13:65]
node _T_2884 = eq(_T_2882, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2886 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h020")) @[Decode.scala 13:65]
node _T_2888 = eq(_T_2886, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2890 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0c")) @[Decode.scala 13:65]
node _T_2892 = eq(_T_2890, UInt<32>("h04")) @[Decode.scala 13:121]
node _T_2894 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h048")) @[Decode.scala 13:65]
node _T_2896 = eq(_T_2894, UInt<32>("h048")) @[Decode.scala 13:121]
node _T_2898 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04050")) @[Decode.scala 13:65]
node _T_2900 = eq(_T_2898, UInt<32>("h04050")) @[Decode.scala 13:121]
node _T_2902 = or(UInt<1>("h00"), _T_2884) @[Decode.scala 14:30]
node _T_2903 = or(_T_2902, _T_2888) @[Decode.scala 14:30]
node _T_2904 = or(_T_2903, _T_2892) @[Decode.scala 14:30]
node _T_2905 = or(_T_2904, _T_2896) @[Decode.scala 14:30]
node _T_2906 = or(_T_2905, _T_2900) @[Decode.scala 14:30]
node _T_2908 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h048")) @[Decode.scala 13:65]
node _T_2910 = eq(_T_2908, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2912 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h018")) @[Decode.scala 13:65]
node _T_2914 = eq(_T_2912, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2916 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04008")) @[Decode.scala 13:65]
node _T_2918 = eq(_T_2916, UInt<32>("h04000")) @[Decode.scala 13:121]
node _T_2920 = or(UInt<1>("h00"), _T_2910) @[Decode.scala 14:30]
node _T_2921 = or(_T_2920, _T_2858) @[Decode.scala 14:30]
node _T_2922 = or(_T_2921, _T_2914) @[Decode.scala 14:30]
node _T_2923 = or(_T_2922, _T_2918) @[Decode.scala 14:30]
node _T_2924 = cat(_T_2923, _T_2906) @[Cat.scala 30:58]
node _T_2926 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04004")) @[Decode.scala 13:65]
node _T_2928 = eq(_T_2926, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2930 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h050")) @[Decode.scala 13:65]
node _T_2932 = eq(_T_2930, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2934 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h024")) @[Decode.scala 13:65]
node _T_2936 = eq(_T_2934, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2938 = or(UInt<1>("h00"), _T_2928) @[Decode.scala 14:30]
node _T_2939 = or(_T_2938, _T_2932) @[Decode.scala 14:30]
node _T_2940 = or(_T_2939, _T_2858) @[Decode.scala 14:30]
node _T_2941 = or(_T_2940, _T_2936) @[Decode.scala 14:30]
node _T_2942 = or(_T_2941, _T_2914) @[Decode.scala 14:30]
node _T_2944 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h034")) @[Decode.scala 13:65]
node _T_2946 = eq(_T_2944, UInt<32>("h014")) @[Decode.scala 13:121]
node _T_2948 = or(UInt<1>("h00"), _T_2946) @[Decode.scala 14:30]
node _T_2949 = or(_T_2948, _T_2896) @[Decode.scala 14:30]
node _T_2950 = cat(_T_2949, _T_2942) @[Cat.scala 30:58]
node _T_2952 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h018")) @[Decode.scala 13:65]
node _T_2954 = eq(_T_2952, UInt<32>("h08")) @[Decode.scala 13:121]
node _T_2956 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h044")) @[Decode.scala 13:65]
node _T_2958 = eq(_T_2956, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_2960 = or(UInt<1>("h00"), _T_2954) @[Decode.scala 14:30]
node _T_2961 = or(_T_2960, _T_2958) @[Decode.scala 14:30]
node _T_2963 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h014")) @[Decode.scala 13:65]
node _T_2965 = eq(_T_2963, UInt<32>("h014")) @[Decode.scala 13:121]
node _T_2967 = or(UInt<1>("h00"), _T_2954) @[Decode.scala 14:30]
node _T_2968 = or(_T_2967, _T_2965) @[Decode.scala 14:30]
node _T_2970 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h030")) @[Decode.scala 13:65]
node _T_2972 = eq(_T_2970, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2974 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0201c")) @[Decode.scala 13:65]
node _T_2976 = eq(_T_2974, UInt<32>("h04")) @[Decode.scala 13:121]
node _T_2978 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h014")) @[Decode.scala 13:65]
node _T_2980 = eq(_T_2978, UInt<32>("h010")) @[Decode.scala 13:121]
node _T_2982 = or(UInt<1>("h00"), _T_2972) @[Decode.scala 14:30]
node _T_2983 = or(_T_2982, _T_2976) @[Decode.scala 14:30]
node _T_2984 = or(_T_2983, _T_2980) @[Decode.scala 14:30]
node _T_2985 = cat(_T_2984, _T_2968) @[Cat.scala 30:58]
node _T_2986 = cat(_T_2985, _T_2961) @[Cat.scala 30:58]
node _T_2988 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h010")) @[Decode.scala 13:65]
node _T_2990 = eq(_T_2988, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2992 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h08")) @[Decode.scala 13:65]
node _T_2994 = eq(_T_2992, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_2996 = or(UInt<1>("h00"), _T_2990) @[Decode.scala 14:30]
node _T_2997 = or(_T_2996, _T_2994) @[Decode.scala 14:30]
node _T_2999 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h03054")) @[Decode.scala 13:65]
node _T_3001 = eq(_T_2999, UInt<32>("h01010")) @[Decode.scala 13:121]
node _T_3003 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h01058")) @[Decode.scala 13:65]
node _T_3005 = eq(_T_3003, UInt<32>("h01040")) @[Decode.scala 13:121]
node _T_3007 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07044")) @[Decode.scala 13:65]
node _T_3009 = eq(_T_3007, UInt<32>("h07000")) @[Decode.scala 13:121]
node _T_3011 = or(UInt<1>("h00"), _T_3001) @[Decode.scala 14:30]
node _T_3012 = or(_T_3011, _T_3005) @[Decode.scala 14:30]
node _T_3013 = or(_T_3012, _T_3009) @[Decode.scala 14:30]
node _T_3015 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04054")) @[Decode.scala 13:65]
node _T_3017 = eq(_T_3015, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_3019 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02058")) @[Decode.scala 13:65]
node _T_3021 = eq(_T_3019, UInt<32>("h02040")) @[Decode.scala 13:121]
node _T_3023 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h03054")) @[Decode.scala 13:65]
node _T_3025 = eq(_T_3023, UInt<32>("h03010")) @[Decode.scala 13:121]
node _T_3027 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h06054")) @[Decode.scala 13:65]
node _T_3029 = eq(_T_3027, UInt<32>("h06010")) @[Decode.scala 13:121]
node _T_3031 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h040003034")) @[Decode.scala 13:65]
node _T_3033 = eq(_T_3031, UInt<32>("h040000030")) @[Decode.scala 13:121]
node _T_3035 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h040001054")) @[Decode.scala 13:65]
node _T_3037 = eq(_T_3035, UInt<32>("h040001010")) @[Decode.scala 13:121]
node _T_3039 = or(UInt<1>("h00"), _T_3017) @[Decode.scala 14:30]
node _T_3040 = or(_T_3039, _T_3021) @[Decode.scala 14:30]
node _T_3041 = or(_T_3040, _T_3025) @[Decode.scala 14:30]
node _T_3042 = or(_T_3041, _T_3029) @[Decode.scala 14:30]
node _T_3043 = or(_T_3042, _T_3033) @[Decode.scala 14:30]
node _T_3044 = or(_T_3043, _T_3037) @[Decode.scala 14:30]
node _T_3046 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02054")) @[Decode.scala 13:65]
node _T_3048 = eq(_T_3046, UInt<32>("h02010")) @[Decode.scala 13:121]
node _T_3050 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h040004054")) @[Decode.scala 13:65]
node _T_3052 = eq(_T_3050, UInt<32>("h04010")) @[Decode.scala 13:121]
node _T_3054 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h05054")) @[Decode.scala 13:65]
node _T_3056 = eq(_T_3054, UInt<32>("h04010")) @[Decode.scala 13:121]
node _T_3058 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04058")) @[Decode.scala 13:65]
node _T_3060 = eq(_T_3058, UInt<32>("h04040")) @[Decode.scala 13:121]
node _T_3062 = or(UInt<1>("h00"), _T_3048) @[Decode.scala 14:30]
node _T_3063 = or(_T_3062, _T_3052) @[Decode.scala 14:30]
node _T_3064 = or(_T_3063, _T_3056) @[Decode.scala 14:30]
node _T_3065 = or(_T_3064, _T_3060) @[Decode.scala 14:30]
node _T_3067 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h06054")) @[Decode.scala 13:65]
node _T_3069 = eq(_T_3067, UInt<32>("h02010")) @[Decode.scala 13:121]
node _T_3071 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h040003054")) @[Decode.scala 13:65]
node _T_3073 = eq(_T_3071, UInt<32>("h040001010")) @[Decode.scala 13:121]
node _T_3075 = or(UInt<1>("h00"), _T_3069) @[Decode.scala 14:30]
node _T_3076 = or(_T_3075, _T_3060) @[Decode.scala 14:30]
node _T_3077 = or(_T_3076, _T_3033) @[Decode.scala 14:30]
node _T_3078 = or(_T_3077, _T_3073) @[Decode.scala 14:30]
node _T_3079 = cat(_T_3044, _T_3013) @[Cat.scala 30:58]
node _T_3080 = cat(_T_3078, _T_3065) @[Cat.scala 30:58]
node _T_3081 = cat(_T_3080, _T_3079) @[Cat.scala 30:58]
node _T_3083 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0405f")) @[Decode.scala 13:65]
node _T_3085 = eq(_T_3083, UInt<32>("h03")) @[Decode.scala 13:121]
node _T_3087 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0107f")) @[Decode.scala 13:65]
node _T_3089 = eq(_T_3087, UInt<32>("h03")) @[Decode.scala 13:121]
node _T_3091 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0707f")) @[Decode.scala 13:65]
node _T_3093 = eq(_T_3091, UInt<32>("h0100f")) @[Decode.scala 13:121]
node _T_3095 = or(UInt<1>("h00"), _T_3085) @[Decode.scala 14:30]
node _T_3096 = or(_T_3095, _T_2605) @[Decode.scala 14:30]
node _T_3097 = or(_T_3096, _T_3089) @[Decode.scala 14:30]
node _T_3098 = or(_T_3097, _T_3093) @[Decode.scala 14:30]
node _T_3099 = or(_T_3098, _T_2661) @[Decode.scala 14:30]
node _T_3100 = or(_T_3099, _T_2669) @[Decode.scala 14:30]
node _T_3101 = or(_T_3100, _T_2693) @[Decode.scala 14:30]
node _T_3102 = or(_T_3101, _T_2697) @[Decode.scala 14:30]
node _T_3104 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02008")) @[Decode.scala 13:65]
node _T_3106 = eq(_T_3104, UInt<32>("h08")) @[Decode.scala 13:121]
node _T_3108 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h028")) @[Decode.scala 13:65]
node _T_3110 = eq(_T_3108, UInt<32>("h020")) @[Decode.scala 13:121]
node _T_3112 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h018000020")) @[Decode.scala 13:65]
node _T_3114 = eq(_T_3112, UInt<32>("h018000020")) @[Decode.scala 13:121]
node _T_3116 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h020000020")) @[Decode.scala 13:65]
node _T_3118 = eq(_T_3116, UInt<32>("h020000020")) @[Decode.scala 13:121]
node _T_3120 = or(UInt<1>("h00"), _T_3106) @[Decode.scala 14:30]
node _T_3121 = or(_T_3120, _T_3110) @[Decode.scala 14:30]
node _T_3122 = or(_T_3121, _T_3114) @[Decode.scala 14:30]
node _T_3123 = or(_T_3122, _T_3118) @[Decode.scala 14:30]
node _T_3125 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h010002008")) @[Decode.scala 13:65]
node _T_3127 = eq(_T_3125, UInt<32>("h010002008")) @[Decode.scala 13:121]
node _T_3129 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h040002008")) @[Decode.scala 13:65]
node _T_3131 = eq(_T_3129, UInt<32>("h040002008")) @[Decode.scala 13:121]
node _T_3133 = or(UInt<1>("h00"), _T_3127) @[Decode.scala 14:30]
node _T_3134 = or(_T_3133, _T_3131) @[Decode.scala 14:30]
node _T_3136 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h08000008")) @[Decode.scala 13:65]
node _T_3138 = eq(_T_3136, UInt<32>("h08000008")) @[Decode.scala 13:121]
node _T_3140 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h010000008")) @[Decode.scala 13:65]
node _T_3142 = eq(_T_3140, UInt<32>("h010000008")) @[Decode.scala 13:121]
node _T_3144 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h080000008")) @[Decode.scala 13:65]
node _T_3146 = eq(_T_3144, UInt<32>("h080000008")) @[Decode.scala 13:121]
node _T_3148 = or(UInt<1>("h00"), _T_3106) @[Decode.scala 14:30]
node _T_3149 = or(_T_3148, _T_3138) @[Decode.scala 14:30]
node _T_3150 = or(_T_3149, _T_3142) @[Decode.scala 14:30]
node _T_3151 = or(_T_3150, _T_3146) @[Decode.scala 14:30]
node _T_3153 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h018002008")) @[Decode.scala 13:65]
node _T_3155 = eq(_T_3153, UInt<32>("h02008")) @[Decode.scala 13:121]
node _T_3157 = or(UInt<1>("h00"), _T_3155) @[Decode.scala 14:30]
node _T_3159 = cat(_T_3134, _T_3123) @[Cat.scala 30:58]
node _T_3160 = cat(UInt<1>("h00"), _T_3157) @[Cat.scala 30:58]
node _T_3161 = cat(_T_3160, _T_3151) @[Cat.scala 30:58]
node _T_3162 = cat(_T_3161, _T_3159) @[Cat.scala 30:58]
node _T_3164 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h01000")) @[Decode.scala 13:65]
node _T_3166 = eq(_T_3164, UInt<32>("h01000")) @[Decode.scala 13:121]
node _T_3168 = or(UInt<1>("h00"), _T_3166) @[Decode.scala 14:30]
node _T_3170 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02000")) @[Decode.scala 13:65]
node _T_3172 = eq(_T_3170, UInt<32>("h02000")) @[Decode.scala 13:121]
node _T_3174 = or(UInt<1>("h00"), _T_3172) @[Decode.scala 14:30]
node _T_3176 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h04000")) @[Decode.scala 13:65]
node _T_3178 = eq(_T_3176, UInt<32>("h04000")) @[Decode.scala 13:121]
node _T_3180 = or(UInt<1>("h00"), _T_3178) @[Decode.scala 14:30]
node _T_3181 = cat(_T_3180, _T_3174) @[Cat.scala 30:58]
node _T_3182 = cat(_T_3181, _T_3168) @[Cat.scala 30:58]
node _T_3184 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h080000060")) @[Decode.scala 13:65]
node _T_3186 = eq(_T_3184, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_3188 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h010000060")) @[Decode.scala 13:65]
node _T_3190 = eq(_T_3188, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_3192 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h070")) @[Decode.scala 13:65]
node _T_3194 = eq(_T_3192, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_3196 = or(UInt<1>("h00"), _T_3186) @[Decode.scala 14:30]
node _T_3197 = or(_T_3196, _T_3190) @[Decode.scala 14:30]
node _T_3198 = or(_T_3197, _T_3194) @[Decode.scala 14:30]
node _T_3200 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h07c")) @[Decode.scala 13:65]
node _T_3202 = eq(_T_3200, UInt<32>("h024")) @[Decode.scala 13:121]
node _T_3204 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h040000060")) @[Decode.scala 13:65]
node _T_3206 = eq(_T_3204, UInt<32>("h040")) @[Decode.scala 13:121]
node _T_3208 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h090000060")) @[Decode.scala 13:65]
node _T_3210 = eq(_T_3208, UInt<32>("h010000040")) @[Decode.scala 13:121]
node _T_3212 = or(UInt<1>("h00"), _T_3202) @[Decode.scala 14:30]
node _T_3213 = or(_T_3212, _T_3206) @[Decode.scala 14:30]
node _T_3214 = or(_T_3213, _T_3194) @[Decode.scala 14:30]
node _T_3215 = or(_T_3214, _T_3210) @[Decode.scala 14:30]
node _T_3217 = or(UInt<1>("h00"), _T_3194) @[Decode.scala 14:30]
node _T_3219 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h03c")) @[Decode.scala 13:65]
node _T_3221 = eq(_T_3219, UInt<32>("h04")) @[Decode.scala 13:121]
node _T_3223 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h010000060")) @[Decode.scala 13:65]
node _T_3225 = eq(_T_3223, UInt<32>("h010000040")) @[Decode.scala 13:121]
node _T_3227 = or(UInt<1>("h00"), _T_3221) @[Decode.scala 14:30]
node _T_3228 = or(_T_3227, _T_3186) @[Decode.scala 14:30]
node _T_3229 = or(_T_3228, _T_3194) @[Decode.scala 14:30]
node _T_3230 = or(_T_3229, _T_3225) @[Decode.scala 14:30]
node _T_3232 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02000074")) @[Decode.scala 13:65]
node _T_3234 = eq(_T_3232, UInt<32>("h02000030")) @[Decode.scala 13:121]
node _T_3236 = or(UInt<1>("h00"), _T_3234) @[Decode.scala 14:30]
node _T_3238 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h064")) @[Decode.scala 13:65]
node _T_3240 = eq(_T_3238, UInt<32>("h00")) @[Decode.scala 13:121]
node _T_3242 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h050")) @[Decode.scala 13:65]
node _T_3244 = eq(_T_3242, UInt<32>("h010")) @[Decode.scala 13:121]
node _T_3246 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02024")) @[Decode.scala 13:65]
node _T_3248 = eq(_T_3246, UInt<32>("h024")) @[Decode.scala 13:121]
node _T_3250 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h028")) @[Decode.scala 13:65]
node _T_3252 = eq(_T_3250, UInt<32>("h028")) @[Decode.scala 13:121]
node _T_3254 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h01030")) @[Decode.scala 13:65]
node _T_3256 = eq(_T_3254, UInt<32>("h01030")) @[Decode.scala 13:121]
node _T_3258 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02030")) @[Decode.scala 13:65]
node _T_3260 = eq(_T_3258, UInt<32>("h02030")) @[Decode.scala 13:121]
node _T_3262 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h090000010")) @[Decode.scala 13:65]
node _T_3264 = eq(_T_3262, UInt<32>("h080000010")) @[Decode.scala 13:121]
node _T_3266 = or(UInt<1>("h00"), _T_3240) @[Decode.scala 14:30]
node _T_3267 = or(_T_3266, _T_3244) @[Decode.scala 14:30]
node _T_3268 = or(_T_3267, _T_3248) @[Decode.scala 14:30]
node _T_3269 = or(_T_3268, _T_3252) @[Decode.scala 14:30]
node _T_3270 = or(_T_3269, _T_3256) @[Decode.scala 14:30]
node _T_3271 = or(_T_3270, _T_3260) @[Decode.scala 14:30]
node _T_3272 = or(_T_3271, _T_3264) @[Decode.scala 14:30]
node _T_3274 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h01070")) @[Decode.scala 13:65]
node _T_3276 = eq(_T_3274, UInt<32>("h01070")) @[Decode.scala 13:121]
node _T_3278 = or(UInt<1>("h00"), _T_3276) @[Decode.scala 14:30]
node _T_3280 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02070")) @[Decode.scala 13:65]
node _T_3282 = eq(_T_3280, UInt<32>("h02070")) @[Decode.scala 13:121]
node _T_3284 = or(UInt<1>("h00"), _T_3282) @[Decode.scala 14:30]
node _T_3286 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h03070")) @[Decode.scala 13:65]
node _T_3288 = eq(_T_3286, UInt<32>("h070")) @[Decode.scala 13:121]
node _T_3290 = or(UInt<1>("h00"), _T_3288) @[Decode.scala 14:30]
node _T_3291 = cat(_T_3290, _T_3284) @[Cat.scala 30:58]
node _T_3292 = cat(_T_3291, _T_3278) @[Cat.scala 30:58]
node _T_3294 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h03058")) @[Decode.scala 13:65]
node _T_3296 = eq(_T_3294, UInt<32>("h01008")) @[Decode.scala 13:121]
node _T_3298 = or(UInt<1>("h00"), _T_3296) @[Decode.scala 14:30]
node _T_3300 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h03058")) @[Decode.scala 13:65]
node _T_3302 = eq(_T_3300, UInt<32>("h08")) @[Decode.scala 13:121]
node _T_3304 = or(UInt<1>("h00"), _T_3302) @[Decode.scala 14:30]
node _T_3306 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h06048")) @[Decode.scala 13:65]
node _T_3308 = eq(_T_3306, UInt<32>("h02008")) @[Decode.scala 13:121]
node _T_3310 = or(UInt<1>("h00"), _T_3308) @[Decode.scala 14:30]
node _T_3312 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0105c")) @[Decode.scala 13:65]
node _T_3314 = eq(_T_3312, UInt<32>("h01004")) @[Decode.scala 13:121]
node _T_3316 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h02000060")) @[Decode.scala 13:65]
node _T_3318 = eq(_T_3316, UInt<32>("h02000040")) @[Decode.scala 13:121]
node _T_3320 = and(ibuf.io.inst[0].bits.inst.bits, UInt<32>("h0d0000070")) @[Decode.scala 13:65]
node _T_3322 = eq(_T_3320, UInt<32>("h040000050")) @[Decode.scala 13:121]
node _T_3324 = or(UInt<1>("h00"), _T_3314) @[Decode.scala 14:30]
node _T_3325 = or(_T_3324, _T_3318) @[Decode.scala 14:30]
node _T_3326 = or(_T_3325, _T_3322) @[Decode.scala 14:30]
id_ctrl.legal <= _T_2803 @[IDecode.scala 65:42]
id_ctrl.fp <= _T_2814 @[IDecode.scala 65:42]
id_ctrl.rocc <= UInt<1>("h00") @[IDecode.scala 65:42]
id_ctrl.branch <= _T_2821 @[IDecode.scala 65:42]
id_ctrl.jal <= _T_2827 @[IDecode.scala 65:42]
id_ctrl.jalr <= _T_2833 @[IDecode.scala 65:42]
id_ctrl.rxs2 <= _T_2854 @[IDecode.scala 65:42]
id_ctrl.rxs1 <= _T_2880 @[IDecode.scala 65:42]
id_ctrl.sel_alu2 <= _T_2924 @[IDecode.scala 65:42]
id_ctrl.sel_alu1 <= _T_2950 @[IDecode.scala 65:42]
id_ctrl.sel_imm <= _T_2986 @[IDecode.scala 65:42]
id_ctrl.alu_dw <= _T_2997 @[IDecode.scala 65:42]
id_ctrl.alu_fn <= _T_3081 @[IDecode.scala 65:42]
id_ctrl.mem <= _T_3102 @[IDecode.scala 65:42]
id_ctrl.mem_cmd <= _T_3162 @[IDecode.scala 65:42]
id_ctrl.mem_type <= _T_3182 @[IDecode.scala 65:42]
id_ctrl.rfs1 <= _T_3198 @[IDecode.scala 65:42]
id_ctrl.rfs2 <= _T_3215 @[IDecode.scala 65:42]
id_ctrl.rfs3 <= _T_3217 @[IDecode.scala 65:42]
id_ctrl.wfd <= _T_3230 @[IDecode.scala 65:42]
id_ctrl.div <= _T_3236 @[IDecode.scala 65:42]
id_ctrl.wxd <= _T_3272 @[IDecode.scala 65:42]
id_ctrl.csr <= _T_3292 @[IDecode.scala 65:42]
id_ctrl.fence_i <= _T_3298 @[IDecode.scala 65:42]
id_ctrl.fence <= _T_3304 @[IDecode.scala 65:42]
id_ctrl.amo <= _T_3310 @[IDecode.scala 65:42]
id_ctrl.dp <= _T_3326 @[IDecode.scala 65:42]
wire id_load_use : UInt<1> @[Rocket.scala 177:25]
id_load_use is invalid @[Rocket.scala 177:25]
reg id_reg_fence : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[Rocket.scala 178:25]
cmem _T_3331 : UInt<64>[31] @[Rocket.scala 682:23]
wire id_rs_0 : UInt @[Rocket.scala 688:26]
id_rs_0 is invalid @[Rocket.scala 688:26]
node _T_3335 = eq(ibuf.io.inst[0].bits.inst.rs1, UInt<1>("h00")) @[Rocket.scala 689:45]
node _T_3336 = and(UInt<1>("h00"), _T_3335) @[Rocket.scala 689:37]
node _T_3338 = bits(ibuf.io.inst[0].bits.inst.rs1, 4, 0) @[Rocket.scala 683:44]
node _T_3339 = not(_T_3338) @[Rocket.scala 683:39]
infer mport _T_3340 = _T_3331[_T_3339], clock
node _T_3341 = mux(_T_3336, UInt<1>("h00"), _T_3340) @[Rocket.scala 689:25]
id_rs_0 <= _T_3341 @[Rocket.scala 689:19]
wire id_rs_1 : UInt @[Rocket.scala 688:26]
id_rs_1 is invalid @[Rocket.scala 688:26]
node _T_3345 = eq(ibuf.io.inst[0].bits.inst.rs2, UInt<1>("h00")) @[Rocket.scala 689:45]
node _T_3346 = and(UInt<1>("h00"), _T_3345) @[Rocket.scala 689:37]
node _T_3348 = bits(ibuf.io.inst[0].bits.inst.rs2, 4, 0) @[Rocket.scala 683:44]
node _T_3349 = not(_T_3348) @[Rocket.scala 683:39]
infer mport _T_3350 = _T_3331[_T_3349], clock
node _T_3351 = mux(_T_3346, UInt<1>("h00"), _T_3350) @[Rocket.scala 689:25]
id_rs_1 <= _T_3351 @[Rocket.scala 689:19]
wire ctrl_killd : UInt<1> @[Rocket.scala 183:24]
ctrl_killd is invalid @[Rocket.scala 183:24]
node _T_3353 = asSInt(ibuf.io.pc) @[Rocket.scala 184:28]
node _T_3356 = eq(UInt<3>("h03"), UInt<3>("h05")) @[Rocket.scala 704:24]
node _T_3358 = bits(ibuf.io.inst[0].bits.inst.bits, 31, 31) @[Rocket.scala 704:48]
node _T_3359 = asSInt(_T_3358) @[Rocket.scala 704:53]
node _T_3360 = mux(_T_3356, asSInt(UInt<1>("h00")), _T_3359) @[Rocket.scala 704:19]
node _T_3362 = eq(UInt<3>("h03"), UInt<3>("h02")) @[Rocket.scala 705:26]
node _T_3363 = bits(ibuf.io.inst[0].bits.inst.bits, 30, 20) @[Rocket.scala 705:41]
node _T_3364 = asSInt(_T_3363) @[Rocket.scala 705:49]
node _T_3365 = mux(_T_3362, _T_3364, _T_3360) @[Rocket.scala 705:21]
node _T_3367 = neq(UInt<3>("h03"), UInt<3>("h02")) @[Rocket.scala 706:26]
node _T_3369 = neq(UInt<3>("h03"), UInt<3>("h03")) @[Rocket.scala 706:43]
node _T_3370 = and(_T_3367, _T_3369) @[Rocket.scala 706:36]
node _T_3371 = bits(ibuf.io.inst[0].bits.inst.bits, 19, 12) @[Rocket.scala 706:65]
node _T_3372 = asSInt(_T_3371) @[Rocket.scala 706:73]
node _T_3373 = mux(_T_3370, _T_3360, _T_3372) @[Rocket.scala 706:21]
node _T_3375 = eq(UInt<3>("h03"), UInt<3>("h02")) @[Rocket.scala 707:23]
node _T_3377 = eq(UInt<3>("h03"), UInt<3>("h05")) @[Rocket.scala 707:40]
node _T_3378 = or(_T_3375, _T_3377) @[Rocket.scala 707:33]
node _T_3381 = eq(UInt<3>("h03"), UInt<3>("h03")) @[Rocket.scala 708:23]
node _T_3382 = bits(ibuf.io.inst[0].bits.inst.bits, 20, 20) @[Rocket.scala 708:39]
node _T_3383 = asSInt(_T_3382) @[Rocket.scala 708:44]
node _T_3385 = eq(UInt<3>("h03"), UInt<3>("h01")) @[Rocket.scala 709:23]
node _T_3386 = bits(ibuf.io.inst[0].bits.inst.bits, 7, 7) @[Rocket.scala 709:39]
node _T_3387 = asSInt(_T_3386) @[Rocket.scala 709:43]
node _T_3388 = mux(_T_3385, _T_3387, _T_3360) @[Rocket.scala 709:18]
node _T_3389 = mux(_T_3381, _T_3383, _T_3388) @[Rocket.scala 708:18]
node _T_3390 = mux(_T_3378, asSInt(UInt<1>("h00")), _T_3389) @[Rocket.scala 707:18]
node _T_3392 = eq(UInt<3>("h03"), UInt<3>("h02")) @[Rocket.scala 710:25]
node _T_3394 = eq(UInt<3>("h03"), UInt<3>("h05")) @[Rocket.scala 710:42]
node _T_3395 = or(_T_3392, _T_3394) @[Rocket.scala 710:35]
node _T_3397 = bits(ibuf.io.inst[0].bits.inst.bits, 30, 25) @[Rocket.scala 710:66]
node _T_3398 = mux(_T_3395, UInt<1>("h00"), _T_3397) @[Rocket.scala 710:20]
node _T_3400 = eq(UInt<3>("h03"), UInt<3>("h02")) @[Rocket.scala 711:24]
node _T_3403 = eq(UInt<3>("h03"), UInt<3>("h00")) @[Rocket.scala 712:24]
node _T_3405 = eq(UInt<3>("h03"), UInt<3>("h01")) @[Rocket.scala 712:41]
node _T_3406 = or(_T_3403, _T_3405) @[Rocket.scala 712:34]
node _T_3407 = bits(ibuf.io.inst[0].bits.inst.bits, 11, 8) @[Rocket.scala 712:57]
node _T_3409 = eq(UInt<3>("h03"), UInt<3>("h05")) @[Rocket.scala 713:24]
node _T_3410 = bits(ibuf.io.inst[0].bits.inst.bits, 19, 16) @[Rocket.scala 713:39]
node _T_3411 = bits(ibuf.io.inst[0].bits.inst.bits, 24, 21) @[Rocket.scala 713:52]
node _T_3412 = mux(_T_3409, _T_3410, _T_3411) @[Rocket.scala 713:19]
node _T_3413 = mux(_T_3406, _T_3407, _T_3412) @[Rocket.scala 712:19]
node _T_3414 = mux(_T_3400, UInt<1>("h00"), _T_3413) @[Rocket.scala 711:19]
node _T_3416 = eq(UInt<3>("h03"), UInt<3>("h00")) @[Rocket.scala 714:22]
node _T_3417 = bits(ibuf.io.inst[0].bits.inst.bits, 7, 7) @[Rocket.scala 714:37]
node _T_3419 = eq(UInt<3>("h03"), UInt<3>("h04")) @[Rocket.scala 715:22]
node _T_3420 = bits(ibuf.io.inst[0].bits.inst.bits, 20, 20) @[Rocket.scala 715:37]
node _T_3422 = eq(UInt<3>("h03"), UInt<3>("h05")) @[Rocket.scala 716:22]
node _T_3423 = bits(ibuf.io.inst[0].bits.inst.bits, 15, 15) @[Rocket.scala 716:37]
node _T_3425 = mux(_T_3422, _T_3423, UInt<1>("h00")) @[Rocket.scala 716:17]
node _T_3426 = mux(_T_3419, _T_3420, _T_3425) @[Rocket.scala 715:17]
node _T_3427 = mux(_T_3416, _T_3417, _T_3426) @[Rocket.scala 714:17]
node _T_3428 = cat(_T_3398, _T_3414) @[Cat.scala 30:58]
node _T_3429 = cat(_T_3428, _T_3427) @[Cat.scala 30:58]
node _T_3430 = asUInt(_T_3390) @[Cat.scala 30:58]
node _T_3431 = asUInt(_T_3373) @[Cat.scala 30:58]
node _T_3432 = cat(_T_3431, _T_3430) @[Cat.scala 30:58]
node _T_3433 = asUInt(_T_3365) @[Cat.scala 30:58]
node _T_3434 = asUInt(_T_3360) @[Cat.scala 30:58]
node _T_3435 = cat(_T_3434, _T_3433) @[Cat.scala 30:58]
node _T_3436 = cat(_T_3435, _T_3432) @[Cat.scala 30:58]
node _T_3437 = cat(_T_3436, _T_3429) @[Cat.scala 30:58]
node _T_3438 = asSInt(_T_3437) @[Rocket.scala 718:53]
node _T_3439 = add(_T_3353, _T_3438) @[Rocket.scala 184:35]
node _T_3440 = tail(_T_3439, 1) @[Rocket.scala 184:35]
node _T_3441 = asSInt(_T_3440) @[Rocket.scala 184:35]
node id_npc = asUInt(_T_3441) @[Rocket.scala 184:65]
node _T_3444 = eq(ctrl_killd, UInt<1>("h00")) @[Rocket.scala 185:34]
node _T_3445 = and(UInt<1>("h00"), _T_3444) @[Rocket.scala 185:31]
node _T_3446 = and(_T_3445, id_ctrl.jal) @[Rocket.scala 185:46]
take_pc_id <= _T_3446 @[Rocket.scala 185:14]
inst csr of CSRFile @[Rocket.scala 187:19]
csr.io is invalid
csr.clock <= clock
csr.reset <= reset
node _T_3450 = eq(id_ctrl.csr, UInt<3>("h02")) @[Package.scala 7:47]
node _T_3451 = eq(id_ctrl.csr, UInt<3>("h03")) @[Package.scala 7:47]
node _T_3452 = eq(id_ctrl.csr, UInt<3>("h01")) @[Package.scala 7:47]
node _T_3453 = or(_T_3450, _T_3451) @[Package.scala 7:62]
node id_csr_en = or(_T_3453, _T_3452) @[Package.scala 7:62]
node id_system_insn = geq(id_ctrl.csr, UInt<3>("h04")) @[Rocket.scala 189:36]
node _T_3457 = eq(id_ctrl.csr, UInt<3>("h02")) @[Package.scala 7:47]
node _T_3458 = eq(id_ctrl.csr, UInt<3>("h03")) @[Package.scala 7:47]
node _T_3459 = or(_T_3457, _T_3458) @[Package.scala 7:62]
node _T_3461 = eq(ibuf.io.inst[0].bits.inst.rs1, UInt<1>("h00")) @[Rocket.scala 190:67]
node id_csr_ren = and(_T_3459, _T_3461) @[Rocket.scala 190:54]
node id_csr = mux(id_csr_ren, UInt<3>("h05"), id_ctrl.csr) @[Rocket.scala 191:19]
node _T_3464 = eq(id_csr_ren, UInt<1>("h00")) @[Rocket.scala 192:54]
node _T_3465 = and(id_csr_en, _T_3464) @[Rocket.scala 192:51]
node _T_3466 = and(_T_3465, csr.io.decode.write_flush) @[Rocket.scala 192:66]
node id_csr_flush = or(id_system_insn, _T_3466) @[Rocket.scala 192:37]
node _T_3468 = eq(id_ctrl.legal, UInt<1>("h00")) @[Rocket.scala 194:25]
node _T_3469 = bits(csr.io.status.isa, 12, 12) @[Rocket.scala 195:38]
node _T_3471 = eq(_T_3469, UInt<1>("h00")) @[Rocket.scala 195:20]
node _T_3472 = and(id_ctrl.div, _T_3471) @[Rocket.scala 195:17]
node _T_3473 = or(_T_3468, _T_3472) @[Rocket.scala 194:40]
node _T_3474 = bits(csr.io.status.isa, 0, 0) @[Rocket.scala 196:38]
node _T_3476 = eq(_T_3474, UInt<1>("h00")) @[Rocket.scala 196:20]
node _T_3477 = and(id_ctrl.amo, _T_3476) @[Rocket.scala 196:17]
node _T_3478 = or(_T_3473, _T_3477) @[Rocket.scala 195:48]
node _T_3479 = or(csr.io.decode.fp_illegal, io.fpu.illegal_rm) @[Rocket.scala 197:45]
node _T_3480 = and(id_ctrl.fp, _T_3479) @[Rocket.scala 197:16]
node _T_3481 = or(_T_3478, _T_3480) @[Rocket.scala 196:48]
node _T_3482 = bits(csr.io.status.isa, 3, 3) @[Rocket.scala 198:37]
node _T_3484 = eq(_T_3482, UInt<1>("h00")) @[Rocket.scala 198:19]
node _T_3485 = and(id_ctrl.dp, _T_3484) @[Rocket.scala 198:16]
node _T_3486 = or(_T_3481, _T_3485) @[Rocket.scala 197:67]
node _T_3487 = bits(csr.io.status.isa, 2, 2) @[Rocket.scala 199:51]
node _T_3489 = eq(_T_3487, UInt<1>("h00")) @[Rocket.scala 199:33]
node _T_3490 = and(ibuf.io.inst[0].bits.rvc, _T_3489) @[Rocket.scala 199:30]
node _T_3491 = or(_T_3486, _T_3490) @[Rocket.scala 198:47]
node _T_3492 = and(id_ctrl.rocc, csr.io.decode.rocc_illegal) @[Rocket.scala 200:18]
node _T_3493 = or(_T_3491, _T_3492) @[Rocket.scala 199:61]
node _T_3495 = eq(id_csr_ren, UInt<1>("h00")) @[Rocket.scala 201:49]
node _T_3496 = and(_T_3495, csr.io.decode.write_illegal) @[Rocket.scala 201:61]
node _T_3497 = or(csr.io.decode.read_illegal, _T_3496) @[Rocket.scala 201:46]
node _T_3498 = and(id_csr_en, _T_3497) @[Rocket.scala 201:15]
node _T_3499 = or(_T_3493, _T_3498) @[Rocket.scala 200:48]
node _T_3500 = and(id_system_insn, csr.io.decode.system_illegal) @[Rocket.scala 202:20]
node id_illegal_insn = or(_T_3499, _T_3500) @[Rocket.scala 201:93]
node id_amo_aq = bits(ibuf.io.inst[0].bits.inst.bits, 26, 26) @[Rocket.scala 204:29]
node id_amo_rl = bits(ibuf.io.inst[0].bits.inst.bits, 25, 25) @[Rocket.scala 205:29]
node _T_3501 = and(id_ctrl.amo, id_amo_rl) @[Rocket.scala 206:52]
node id_fence_next = or(id_ctrl.fence, _T_3501) @[Rocket.scala 206:37]
node _T_3503 = eq(io.dmem.ordered, UInt<1>("h00")) @[Rocket.scala 207:21]
node id_mem_busy = or(_T_3503, io.dmem.req.valid) @[Rocket.scala 207:38]
node _T_3505 = and(ex_reg_valid, ex_ctrl.rocc) @[Rocket.scala 209:35]
node _T_3506 = or(io.rocc.busy, _T_3505) @[Rocket.scala 209:19]
node _T_3507 = and(mem_reg_valid, mem_ctrl.rocc) @[Rocket.scala 210:20]
node _T_3508 = or(_T_3506, _T_3507) @[Rocket.scala 209:51]
node _T_3509 = and(wb_reg_valid, wb_ctrl.rocc) @[Rocket.scala 210:53]
node _T_3510 = or(_T_3508, _T_3509) @[Rocket.scala 210:37]
node id_rocc_busy = and(UInt<1>("h00"), _T_3510) @[Rocket.scala 208:38]
node _T_3511 = and(id_reg_fence, id_mem_busy) @[Rocket.scala 211:49]
node _T_3512 = or(id_fence_next, _T_3511) @[Rocket.scala 211:33]
id_reg_fence <= _T_3512 @[Rocket.scala 211:16]
node _T_3513 = and(id_rocc_busy, id_ctrl.fence) @[Rocket.scala 212:34]
node _T_3514 = and(id_ctrl.amo, id_amo_aq) @[Rocket.scala 213:33]
node _T_3515 = or(_T_3514, id_ctrl.fence_i) @[Rocket.scala 213:46]
node _T_3516 = or(id_ctrl.mem, id_ctrl.rocc) @[Rocket.scala 213:97]
node _T_3517 = and(id_reg_fence, _T_3516) @[Rocket.scala 213:81]
node _T_3518 = or(_T_3515, _T_3517) @[Rocket.scala 213:65]
node _T_3519 = and(id_mem_busy, _T_3518) @[Rocket.scala 213:17]
node id_do_fence = or(_T_3513, _T_3519) @[Rocket.scala 212:51]
inst bpu of BreakpointUnit @[Rocket.scala 215:19]
bpu.io is invalid
bpu.clock <= clock
bpu.reset <= reset
bpu.io.status <- csr.io.status @[Rocket.scala 216:17]
bpu.io.bp <- csr.io.bp @[Rocket.scala 217:13]
bpu.io.pc <= ibuf.io.pc @[Rocket.scala 218:13]
bpu.io.ea <= mem_reg_wdata @[Rocket.scala 219:13]
node id_xcpt_if = or(ibuf.io.inst[0].bits.pf0, ibuf.io.inst[0].bits.pf1) @[Rocket.scala 221:45]
node _T_3552 = or(csr.io.interrupt, bpu.io.debug_if) @[Rocket.scala 645:26]
node _T_3553 = or(_T_3552, bpu.io.xcpt_if) @[Rocket.scala 645:26]
node _T_3554 = or(_T_3553, id_xcpt_if) @[Rocket.scala 645:26]
node id_xcpt = or(_T_3554, id_illegal_insn) @[Rocket.scala 645:26]
node _T_3555 = mux(id_xcpt_if, UInt<1>("h01"), UInt<2>("h02")) @[Mux.scala 31:69]
node _T_3556 = mux(bpu.io.xcpt_if, UInt<2>("h03"), _T_3555) @[Mux.scala 31:69]
node _T_3557 = mux(bpu.io.debug_if, UInt<4>("h0d"), _T_3556) @[Mux.scala 31:69]
node id_cause = mux(csr.io.interrupt, csr.io.interrupt_cause, _T_3557) @[Mux.scala 31:69]
node ex_waddr = bits(ex_reg_inst, 11, 7) @[Rocket.scala 235:29]
node mem_waddr = bits(mem_reg_inst, 11, 7) @[Rocket.scala 236:31]
node wb_waddr = bits(wb_reg_inst, 11, 7) @[Rocket.scala 237:29]
node _T_3561 = and(ex_reg_valid, ex_ctrl.wxd) @[Rocket.scala 240:19]
node _T_3562 = and(mem_reg_valid, mem_ctrl.wxd) @[Rocket.scala 241:20]
node _T_3564 = eq(mem_ctrl.mem, UInt<1>("h00")) @[Rocket.scala 241:39]
node _T_3565 = and(_T_3562, _T_3564) @[Rocket.scala 241:36]
node _T_3566 = and(mem_reg_valid, mem_ctrl.wxd) @[Rocket.scala 242:20]
node _T_3567 = eq(UInt<1>("h00"), ibuf.io.inst[0].bits.inst.rs1) @[Rocket.scala 243:82]
node id_bypass_src_0_0 = and(UInt<1>("h01"), _T_3567) @[Rocket.scala 243:74]
node _T_3568 = eq(ex_waddr, ibuf.io.inst[0].bits.inst.rs1) @[Rocket.scala 243:82]
node id_bypass_src_0_1 = and(_T_3561, _T_3568) @[Rocket.scala 243:74]
node _T_3569 = eq(mem_waddr, ibuf.io.inst[0].bits.inst.rs1) @[Rocket.scala 243:82]
node id_bypass_src_0_2 = and(_T_3565, _T_3569) @[Rocket.scala 243:74]
node _T_3570 = eq(mem_waddr, ibuf.io.inst[0].bits.inst.rs1) @[Rocket.scala 243:82]
node id_bypass_src_0_3 = and(_T_3566, _T_3570) @[Rocket.scala 243:74]
node _T_3571 = eq(UInt<1>("h00"), ibuf.io.inst[0].bits.inst.rs2) @[Rocket.scala 243:82]
node id_bypass_src_1_0 = and(UInt<1>("h01"), _T_3571) @[Rocket.scala 243:74]
node _T_3572 = eq(ex_waddr, ibuf.io.inst[0].bits.inst.rs2) @[Rocket.scala 243:82]
node id_bypass_src_1_1 = and(_T_3561, _T_3572) @[Rocket.scala 243:74]
node _T_3573 = eq(mem_waddr, ibuf.io.inst[0].bits.inst.rs2) @[Rocket.scala 243:82]
node id_bypass_src_1_2 = and(_T_3565, _T_3573) @[Rocket.scala 243:74]
node _T_3574 = eq(mem_waddr, ibuf.io.inst[0].bits.inst.rs2) @[Rocket.scala 243:82]
node id_bypass_src_1_3 = and(_T_3566, _T_3574) @[Rocket.scala 243:74]
wire bypass_mux : UInt[4] @[Rocket.scala 246:23]
bypass_mux is invalid @[Rocket.scala 246:23]
bypass_mux[0] <= UInt<1>("h00") @[Rocket.scala 246:23]
bypass_mux[1] <= mem_reg_wdata @[Rocket.scala 246:23]
bypass_mux[2] <= wb_reg_wdata @[Rocket.scala 246:23]
bypass_mux[3] <= io.dmem.resp.bits.data_word_bypass @[Rocket.scala 246:23]
reg ex_reg_rs_bypass : UInt<1>[2], clock @[Rocket.scala 247:29]
reg ex_reg_rs_lsb : UInt<2>[2], clock @[Rocket.scala 248:26]
reg ex_reg_rs_msb : UInt[2], clock @[Rocket.scala 249:26]
node _T_3605 = cat(ex_reg_rs_msb[0], ex_reg_rs_lsb[0]) @[Cat.scala 30:58]
node ex_rs_0 = mux(ex_reg_rs_bypass[0], bypass_mux[ex_reg_rs_lsb[0]], _T_3605) @[Rocket.scala 251:14]
node _T_3607 = cat(ex_reg_rs_msb[1], ex_reg_rs_lsb[1]) @[Cat.scala 30:58]
node ex_rs_1 = mux(ex_reg_rs_bypass[1], bypass_mux[ex_reg_rs_lsb[1]], _T_3607) @[Rocket.scala 251:14]
node _T_3609 = eq(ex_ctrl.sel_imm, UInt<3>("h05")) @[Rocket.scala 704:24]
node _T_3611 = bits(ex_reg_inst, 31, 31) @[Rocket.scala 704:48]
node _T_3612 = asSInt(_T_3611) @[Rocket.scala 704:53]
node _T_3613 = mux(_T_3609, asSInt(UInt<1>("h00")), _T_3612) @[Rocket.scala 704:19]
node _T_3615 = eq(ex_ctrl.sel_imm, UInt<3>("h02")) @[Rocket.scala 705:26]
node _T_3616 = bits(ex_reg_inst, 30, 20) @[Rocket.scala 705:41]
node _T_3617 = asSInt(_T_3616) @[Rocket.scala 705:49]
node _T_3618 = mux(_T_3615, _T_3617, _T_3613) @[Rocket.scala 705:21]
node _T_3620 = neq(ex_ctrl.sel_imm, UInt<3>("h02")) @[Rocket.scala 706:26]
node _T_3622 = neq(ex_ctrl.sel_imm, UInt<3>("h03")) @[Rocket.scala 706:43]
node _T_3623 = and(_T_3620, _T_3622) @[Rocket.scala 706:36]
node _T_3624 = bits(ex_reg_inst, 19, 12) @[Rocket.scala 706:65]
node _T_3625 = asSInt(_T_3624) @[Rocket.scala 706:73]
node _T_3626 = mux(_T_3623, _T_3613, _T_3625) @[Rocket.scala 706:21]
node _T_3628 = eq(ex_ctrl.sel_imm, UInt<3>("h02")) @[Rocket.scala 707:23]
node _T_3630 = eq(ex_ctrl.sel_imm, UInt<3>("h05")) @[Rocket.scala 707:40]
node _T_3631 = or(_T_3628, _T_3630) @[Rocket.scala 707:33]
node _T_3634 = eq(ex_ctrl.sel_imm, UInt<3>("h03")) @[Rocket.scala 708:23]
node _T_3635 = bits(ex_reg_inst, 20, 20) @[Rocket.scala 708:39]
node _T_3636 = asSInt(_T_3635) @[Rocket.scala 708:44]
node _T_3638 = eq(ex_ctrl.sel_imm, UInt<3>("h01")) @[Rocket.scala 709:23]
node _T_3639 = bits(ex_reg_inst, 7, 7) @[Rocket.scala 709:39]
node _T_3640 = asSInt(_T_3639) @[Rocket.scala 709:43]
node _T_3641 = mux(_T_3638, _T_3640, _T_3613) @[Rocket.scala 709:18]
node _T_3642 = mux(_T_3634, _T_3636, _T_3641) @[Rocket.scala 708:18]
node _T_3643 = mux(_T_3631, asSInt(UInt<1>("h00")), _T_3642) @[Rocket.scala 707:18]
node _T_3645 = eq(ex_ctrl.sel_imm, UInt<3>("h02")) @[Rocket.scala 710:25]
node _T_3647 = eq(ex_ctrl.sel_imm, UInt<3>("h05")) @[Rocket.scala 710:42]
node _T_3648 = or(_T_3645, _T_3647) @[Rocket.scala 710:35]
node _T_3650 = bits(ex_reg_inst, 30, 25) @[Rocket.scala 710:66]
node _T_3651 = mux(_T_3648, UInt<1>("h00"), _T_3650) @[Rocket.scala 710:20]
node _T_3653 = eq(ex_ctrl.sel_imm, UInt<3>("h02")) @[Rocket.scala 711:24]
node _T_3656 = eq(ex_ctrl.sel_imm, UInt<3>("h00")) @[Rocket.scala 712:24]
node _T_3658 = eq(ex_ctrl.sel_imm, UInt<3>("h01")) @[Rocket.scala 712:41]
node _T_3659 = or(_T_3656, _T_3658) @[Rocket.scala 712:34]
node _T_3660 = bits(ex_reg_inst, 11, 8) @[Rocket.scala 712:57]
node _T_3662 = eq(ex_ctrl.sel_imm, UInt<3>("h05")) @[Rocket.scala 713:24]
node _T_3663 = bits(ex_reg_inst, 19, 16) @[Rocket.scala 713:39]
node _T_3664 = bits(ex_reg_inst, 24, 21) @[Rocket.scala 713:52]
node _T_3665 = mux(_T_3662, _T_3663, _T_3664) @[Rocket.scala 713:19]
node _T_3666 = mux(_T_3659, _T_3660, _T_3665) @[Rocket.scala 712:19]
node _T_3667 = mux(_T_3653, UInt<1>("h00"), _T_3666) @[Rocket.scala 711:19]
node _T_3669 = eq(ex_ctrl.sel_imm, UInt<3>("h00")) @[Rocket.scala 714:22]
node _T_3670 = bits(ex_reg_inst, 7, 7) @[Rocket.scala 714:37]
node _T_3672 = eq(ex_ctrl.sel_imm, UInt<3>("h04")) @[Rocket.scala 715:22]
node _T_3673 = bits(ex_reg_inst, 20, 20) @[Rocket.scala 715:37]
node _T_3675 = eq(ex_ctrl.sel_imm, UInt<3>("h05")) @[Rocket.scala 716:22]
node _T_3676 = bits(ex_reg_inst, 15, 15) @[Rocket.scala 716:37]
node _T_3678 = mux(_T_3675, _T_3676, UInt<1>("h00")) @[Rocket.scala 716:17]
node _T_3679 = mux(_T_3672, _T_3673, _T_3678) @[Rocket.scala 715:17]
node _T_3680 = mux(_T_3669, _T_3670, _T_3679) @[Rocket.scala 714:17]
node _T_3681 = cat(_T_3651, _T_3667) @[Cat.scala 30:58]
node _T_3682 = cat(_T_3681, _T_3680) @[Cat.scala 30:58]
node _T_3683 = asUInt(_T_3643) @[Cat.scala 30:58]
node _T_3684 = asUInt(_T_3626) @[Cat.scala 30:58]
node _T_3685 = cat(_T_3684, _T_3683) @[Cat.scala 30:58]
node _T_3686 = asUInt(_T_3618) @[Cat.scala 30:58]
node _T_3687 = asUInt(_T_3613) @[Cat.scala 30:58]
node _T_3688 = cat(_T_3687, _T_3686) @[Cat.scala 30:58]
node _T_3689 = cat(_T_3688, _T_3685) @[Cat.scala 30:58]
node _T_3690 = cat(_T_3689, _T_3682) @[Cat.scala 30:58]
node ex_imm = asSInt(_T_3690) @[Rocket.scala 718:53]
node _T_3693 = asSInt(ex_rs_0) @[Rocket.scala 254:24]
node _T_3695 = asSInt(ex_reg_pc) @[Rocket.scala 255:24]
node _T_3696 = eq(UInt<2>("h02"), ex_ctrl.sel_alu1) @[Mux.scala 46:19]
node _T_3697 = mux(_T_3696, _T_3695, asSInt(UInt<1>("h00"))) @[Mux.scala 46:16]
node _T_3698 = eq(UInt<2>("h01"), ex_ctrl.sel_alu1) @[Mux.scala 46:19]
node ex_op1 = mux(_T_3698, _T_3693, _T_3697) @[Mux.scala 46:16]
node _T_3701 = asSInt(ex_rs_1) @[Rocket.scala 257:24]
node _T_3706 = mux(ex_reg_rvc, asSInt(UInt<3>("h02")), asSInt(UInt<4>("h04"))) @[Rocket.scala 259:19]
node _T_3707 = eq(UInt<2>("h01"), ex_ctrl.sel_alu2) @[Mux.scala 46:19]
node _T_3708 = mux(_T_3707, _T_3706, asSInt(UInt<1>("h00"))) @[Mux.scala 46:16]
node _T_3709 = eq(UInt<2>("h03"), ex_ctrl.sel_alu2) @[Mux.scala 46:19]
node _T_3710 = mux(_T_3709, ex_imm, _T_3708) @[Mux.scala 46:16]
node _T_3711 = eq(UInt<2>("h02"), ex_ctrl.sel_alu2) @[Mux.scala 46:19]
node ex_op2 = mux(_T_3711, _T_3701, _T_3710) @[Mux.scala 46:16]
inst alu of ALU @[Rocket.scala 261:19]
alu.io is invalid
alu.clock <= clock
alu.reset <= reset
alu.io.dw <= ex_ctrl.alu_dw @[Rocket.scala 262:13]
alu.io.fn <= ex_ctrl.alu_fn @[Rocket.scala 263:13]
node _T_3712 = asUInt(ex_op2) @[Rocket.scala 264:24]
alu.io.in2 <= _T_3712 @[Rocket.scala 264:14]
node _T_3713 = asUInt(ex_op1) @[Rocket.scala 265:24]
alu.io.in1 <= _T_3713 @[Rocket.scala 265:14]
inst div of MulDiv @[Rocket.scala 268:19]
div.io is invalid
div.clock <= clock
div.reset <= reset
node _T_3714 = and(ex_reg_valid, ex_ctrl.div) @[Rocket.scala 269:36]
div.io.req.valid <= _T_3714 @[Rocket.scala 269:20]
div.io.req.bits.dw <= ex_ctrl.alu_dw @[Rocket.scala 270:22]
div.io.req.bits.fn <= ex_ctrl.alu_fn @[Rocket.scala 271:22]
div.io.req.bits.in1 <= ex_rs_0 @[Rocket.scala 272:23]
div.io.req.bits.in2 <= ex_rs_1 @[Rocket.scala 273:23]
div.io.req.bits.tag <= ex_waddr @[Rocket.scala 274:23]
node _T_3716 = eq(ctrl_killd, UInt<1>("h00")) @[Rocket.scala 276:19]
ex_reg_valid <= _T_3716 @[Rocket.scala 276:16]
node _T_3718 = eq(take_pc, UInt<1>("h00")) @[Rocket.scala 277:20]
node _T_3719 = and(_T_3718, ibuf.io.inst[0].valid) @[Rocket.scala 277:29]
node _T_3720 = and(_T_3719, ibuf.io.inst[0].bits.replay) @[Rocket.scala 277:54]
ex_reg_replay <= _T_3720 @[Rocket.scala 277:17]
node _T_3722 = eq(ctrl_killd, UInt<1>("h00")) @[Rocket.scala 278:18]
node _T_3723 = and(_T_3722, id_xcpt) @[Rocket.scala 278:30]
ex_reg_xcpt <= _T_3723 @[Rocket.scala 278:15]
node _T_3725 = eq(take_pc, UInt<1>("h00")) @[Rocket.scala 279:28]
node _T_3726 = and(_T_3725, ibuf.io.inst[0].valid) @[Rocket.scala 279:37]
node _T_3727 = and(_T_3726, csr.io.interrupt) @[Rocket.scala 279:62]
ex_reg_xcpt_interrupt <= _T_3727 @[Rocket.scala 279:25]
when id_xcpt : @[Rocket.scala 280:18]
ex_cause <= id_cause @[Rocket.scala 280:33]
skip @[Rocket.scala 280:18]
ex_reg_btb_hit <= ibuf.io.inst[0].bits.btb_hit @[Rocket.scala 281:18]
when ibuf.io.inst[0].bits.btb_hit : @[Rocket.scala 282:39]
ex_reg_btb_resp <- ibuf.io.btb_resp @[Rocket.scala 282:57]
skip @[Rocket.scala 282:39]
node _T_3729 = eq(ctrl_killd, UInt<1>("h00")) @[Rocket.scala 284:9]
when _T_3729 : @[Rocket.scala 284:22]
ex_ctrl <- id_ctrl @[Rocket.scala 285:13]
ex_reg_rvc <= ibuf.io.inst[0].bits.rvc @[Rocket.scala 286:16]
ex_ctrl.csr <= id_csr @[Rocket.scala 287:17]
when id_xcpt : @[Rocket.scala 288:20]
ex_ctrl.alu_fn <= UInt<1>("h00") @[Rocket.scala 289:22]
ex_ctrl.alu_dw <= UInt<1>("h01") @[Rocket.scala 290:22]
ex_ctrl.sel_alu1 <= UInt<2>("h02") @[Rocket.scala 291:24]
ex_ctrl.sel_alu2 <= UInt<2>("h00") @[Rocket.scala 292:24]
node _T_3735 = eq(bpu.io.xcpt_if, UInt<1>("h00")) @[Rocket.scala 293:13]
node _T_3737 = eq(ibuf.io.inst[0].bits.pf0, UInt<1>("h00")) @[Rocket.scala 293:32]
node _T_3738 = and(_T_3735, _T_3737) @[Rocket.scala 293:29]
node _T_3739 = and(_T_3738, ibuf.io.inst[0].bits.pf1) @[Rocket.scala 293:58]
when _T_3739 : @[Rocket.scala 293:87]
ex_ctrl.sel_alu2 <= UInt<2>("h01") @[Rocket.scala 294:26]
ex_reg_rvc <= UInt<1>("h01") @[Rocket.scala 295:20]
skip @[Rocket.scala 293:87]
skip @[Rocket.scala 288:20]
node _T_3742 = or(id_ctrl.fence_i, id_csr_flush) @[Rocket.scala 298:42]
node _T_3743 = or(_T_3742, csr.io.singleStep) @[Rocket.scala 298:58]
ex_reg_flush_pipe <= _T_3743 @[Rocket.scala 298:23]
ex_reg_load_use <= id_load_use @[Rocket.scala 299:21]
node _T_3744 = and(id_ctrl.jalr, csr.io.status.debug) @[Rocket.scala 301:24]
when _T_3744 : @[Rocket.scala 301:48]
ex_reg_flush_pipe <= UInt<1>("h01") @[Rocket.scala 302:25]
ex_ctrl.fence_i <= UInt<1>("h01") @[Rocket.scala 303:23]
skip @[Rocket.scala 301:48]
node _T_3747 = or(id_bypass_src_0_0, id_bypass_src_0_1) @[Rocket.scala 307:48]
node _T_3748 = or(_T_3747, id_bypass_src_0_2) @[Rocket.scala 307:48]
node _T_3749 = or(_T_3748, id_bypass_src_0_3) @[Rocket.scala 307:48]
node _T_3754 = mux(id_bypass_src_0_2, UInt<2>("h02"), UInt<2>("h03")) @[Mux.scala 31:69]
node _T_3755 = mux(id_bypass_src_0_1, UInt<1>("h01"), _T_3754) @[Mux.scala 31:69]
node _T_3756 = mux(id_bypass_src_0_0, UInt<1>("h00"), _T_3755) @[Mux.scala 31:69]
ex_reg_rs_bypass[0] <= _T_3749 @[Rocket.scala 309:27]
ex_reg_rs_lsb[0] <= _T_3756 @[Rocket.scala 310:24]
node _T_3758 = eq(_T_3749, UInt<1>("h00")) @[Rocket.scala 311:26]
node _T_3759 = and(id_ctrl.rxs1, _T_3758) @[Rocket.scala 311:23]
when _T_3759 : @[Rocket.scala 311:38]
node _T_3760 = bits(id_rs_0, 1, 0) @[Rocket.scala 312:37]
ex_reg_rs_lsb[0] <= _T_3760 @[Rocket.scala 312:26]
node _T_3761 = shr(id_rs_0, 2) @[Rocket.scala 313:38]
ex_reg_rs_msb[0] <= _T_3761 @[Rocket.scala 313:26]
skip @[Rocket.scala 311:38]
node _T_3762 = or(id_bypass_src_1_0, id_bypass_src_1_1) @[Rocket.scala 307:48]
node _T_3763 = or(_T_3762, id_bypass_src_1_2) @[Rocket.scala 307:48]
node _T_3764 = or(_T_3763, id_bypass_src_1_3) @[Rocket.scala 307:48]
node _T_3769 = mux(id_bypass_src_1_2, UInt<2>("h02"), UInt<2>("h03")) @[Mux.scala 31:69]
node _T_3770 = mux(id_bypass_src_1_1, UInt<1>("h01"), _T_3769) @[Mux.scala 31:69]
node _T_3771 = mux(id_bypass_src_1_0, UInt<1>("h00"), _T_3770) @[Mux.scala 31:69]
ex_reg_rs_bypass[1] <= _T_3764 @[Rocket.scala 309:27]
ex_reg_rs_lsb[1] <= _T_3771 @[Rocket.scala 310:24]
node _T_3773 = eq(_T_3764, UInt<1>("h00")) @[Rocket.scala 311:26]
node _T_3774 = and(id_ctrl.rxs2, _T_3773) @[Rocket.scala 311:23]
when _T_3774 : @[Rocket.scala 311:38]
node _T_3775 = bits(id_rs_1, 1, 0) @[Rocket.scala 312:37]
ex_reg_rs_lsb[1] <= _T_3775 @[Rocket.scala 312:26]
node _T_3776 = shr(id_rs_1, 2) @[Rocket.scala 313:38]
ex_reg_rs_msb[1] <= _T_3776 @[Rocket.scala 313:26]
skip @[Rocket.scala 311:38]
skip @[Rocket.scala 284:22]
node _T_3778 = eq(ctrl_killd, UInt<1>("h00")) @[Rocket.scala 317:9]
node _T_3779 = or(_T_3778, csr.io.interrupt) @[Rocket.scala 317:21]
node _T_3780 = or(_T_3779, ibuf.io.inst[0].bits.replay) @[Rocket.scala 317:41]
when _T_3780 : @[Rocket.scala 317:73]
ex_reg_inst <= ibuf.io.inst[0].bits.inst.bits @[Rocket.scala 318:17]
ex_reg_pc <= ibuf.io.pc @[Rocket.scala 319:15]
skip @[Rocket.scala 317:73]
node _T_3781 = or(ex_reg_valid, ex_reg_replay) @[Rocket.scala 323:34]
node ex_pc_valid = or(_T_3781, ex_reg_xcpt_interrupt) @[Rocket.scala 323:51]
node _T_3783 = eq(io.dmem.resp.valid, UInt<1>("h00")) @[Rocket.scala 324:39]
node wb_dcache_miss = and(wb_ctrl.mem, _T_3783) @[Rocket.scala 324:36]
node _T_3785 = eq(io.dmem.req.ready, UInt<1>("h00")) @[Rocket.scala 325:45]
node _T_3786 = and(ex_ctrl.mem, _T_3785) @[Rocket.scala 325:42]
node _T_3788 = eq(div.io.req.ready, UInt<1>("h00")) @[Rocket.scala 326:45]
node _T_3789 = and(ex_ctrl.div, _T_3788) @[Rocket.scala 326:42]
node replay_ex_structural = or(_T_3786, _T_3789) @[Rocket.scala 325:64]
node replay_ex_load_use = and(wb_dcache_miss, ex_reg_load_use) @[Rocket.scala 327:43]
node _T_3790 = or(replay_ex_structural, replay_ex_load_use) @[Rocket.scala 328:75]
node _T_3791 = and(ex_reg_valid, _T_3790) @[Rocket.scala 328:50]
node replay_ex = or(ex_reg_replay, _T_3791) @[Rocket.scala 328:33]
node _T_3792 = or(take_pc_mem_wb, replay_ex) @[Rocket.scala 329:35]
node _T_3794 = eq(ex_reg_valid, UInt<1>("h00")) @[Rocket.scala 329:51]
node ctrl_killx = or(_T_3792, _T_3794) @[Rocket.scala 329:48]
node _T_3796 = eq(ex_ctrl.mem_cmd, UInt<3>("h07")) @[Rocket.scala 331:40]
wire _T_3803 : UInt<3>[4] @[Rocket.scala 331:56]
_T_3803 is invalid @[Rocket.scala 331:56]
_T_3803[0] <= UInt<1>("h00") @[Rocket.scala 331:56]
_T_3803[1] <= UInt<3>("h04") @[Rocket.scala 331:56]
_T_3803[2] <= UInt<1>("h01") @[Rocket.scala 331:56]
_T_3803[3] <= UInt<3>("h05") @[Rocket.scala 331:56]
node _T_3810 = eq(_T_3803[0], ex_ctrl.mem_type) @[Rocket.scala 331:91]
node _T_3811 = eq(_T_3803[1], ex_ctrl.mem_type) @[Rocket.scala 331:91]
node _T_3812 = eq(_T_3803[2], ex_ctrl.mem_type) @[Rocket.scala 331:91]
node _T_3813 = eq(_T_3803[3], ex_ctrl.mem_type) @[Rocket.scala 331:91]
node _T_3815 = or(UInt<1>("h00"), _T_3810) @[Rocket.scala 331:91]
node _T_3816 = or(_T_3815, _T_3811) @[Rocket.scala 331:91]
node _T_3817 = or(_T_3816, _T_3812) @[Rocket.scala 331:91]
node _T_3818 = or(_T_3817, _T_3813) @[Rocket.scala 331:91]
node ex_slow_bypass = or(_T_3796, _T_3818) @[Rocket.scala 331:50]
node ex_xcpt = or(ex_reg_xcpt_interrupt, ex_reg_xcpt) @[Rocket.scala 334:28]
node _T_3819 = or(mem_reg_valid, mem_reg_replay) @[Rocket.scala 337:36]
node mem_pc_valid = or(_T_3819, mem_reg_xcpt_interrupt) @[Rocket.scala 337:54]
node mem_br_taken = bits(mem_reg_wdata, 0, 0) @[Rocket.scala 338:35]
node _T_3820 = asSInt(mem_reg_pc) @[Rocket.scala 339:34]
node _T_3821 = and(mem_ctrl.branch, mem_br_taken) @[Rocket.scala 340:25]
node _T_3824 = eq(UInt<3>("h01"), UInt<3>("h05")) @[Rocket.scala 704:24]
node _T_3826 = bits(mem_reg_inst, 31, 31) @[Rocket.scala 704:48]
node _T_3827 = asSInt(_T_3826) @[Rocket.scala 704:53]
node _T_3828 = mux(_T_3824, asSInt(UInt<1>("h00")), _T_3827) @[Rocket.scala 704:19]
node _T_3830 = eq(UInt<3>("h01"), UInt<3>("h02")) @[Rocket.scala 705:26]
node _T_3831 = bits(mem_reg_inst, 30, 20) @[Rocket.scala 705:41]
node _T_3832 = asSInt(_T_3831) @[Rocket.scala 705:49]
node _T_3833 = mux(_T_3830, _T_3832, _T_3828) @[Rocket.scala 705:21]
node _T_3835 = neq(UInt<3>("h01"), UInt<3>("h02")) @[Rocket.scala 706:26]
node _T_3837 = neq(UInt<3>("h01"), UInt<3>("h03")) @[Rocket.scala 706:43]
node _T_3838 = and(_T_3835, _T_3837) @[Rocket.scala 706:36]
node _T_3839 = bits(mem_reg_inst, 19, 12) @[Rocket.scala 706:65]
node _T_3840 = asSInt(_T_3839) @[Rocket.scala 706:73]
node _T_3841 = mux(_T_3838, _T_3828, _T_3840) @[Rocket.scala 706:21]
node _T_3843 = eq(UInt<3>("h01"), UInt<3>("h02")) @[Rocket.scala 707:23]
node _T_3845 = eq(UInt<3>("h01"), UInt<3>("h05")) @[Rocket.scala 707:40]
node _T_3846 = or(_T_3843, _T_3845) @[Rocket.scala 707:33]
node _T_3849 = eq(UInt<3>("h01"), UInt<3>("h03")) @[Rocket.scala 708:23]
node _T_3850 = bits(mem_reg_inst, 20, 20) @[Rocket.scala 708:39]
node _T_3851 = asSInt(_T_3850) @[Rocket.scala 708:44]
node _T_3853 = eq(UInt<3>("h01"), UInt<3>("h01")) @[Rocket.scala 709:23]
node _T_3854 = bits(mem_reg_inst, 7, 7) @[Rocket.scala 709:39]
node _T_3855 = asSInt(_T_3854) @[Rocket.scala 709:43]
node _T_3856 = mux(_T_3853, _T_3855, _T_3828) @[Rocket.scala 709:18]
node _T_3857 = mux(_T_3849, _T_3851, _T_3856) @[Rocket.scala 708:18]
node _T_3858 = mux(_T_3846, asSInt(UInt<1>("h00")), _T_3857) @[Rocket.scala 707:18]
node _T_3860 = eq(UInt<3>("h01"), UInt<3>("h02")) @[Rocket.scala 710:25]
node _T_3862 = eq(UInt<3>("h01"), UInt<3>("h05")) @[Rocket.scala 710:42]
node _T_3863 = or(_T_3860, _T_3862) @[Rocket.scala 710:35]
node _T_3865 = bits(mem_reg_inst, 30, 25) @[Rocket.scala 710:66]
node _T_3866 = mux(_T_3863, UInt<1>("h00"), _T_3865) @[Rocket.scala 710:20]
node _T_3868 = eq(UInt<3>("h01"), UInt<3>("h02")) @[Rocket.scala 711:24]
node _T_3871 = eq(UInt<3>("h01"), UInt<3>("h00")) @[Rocket.scala 712:24]
node _T_3873 = eq(UInt<3>("h01"), UInt<3>("h01")) @[Rocket.scala 712:41]
node _T_3874 = or(_T_3871, _T_3873) @[Rocket.scala 712:34]
node _T_3875 = bits(mem_reg_inst, 11, 8) @[Rocket.scala 712:57]
node _T_3877 = eq(UInt<3>("h01"), UInt<3>("h05")) @[Rocket.scala 713:24]
node _T_3878 = bits(mem_reg_inst, 19, 16) @[Rocket.scala 713:39]
node _T_3879 = bits(mem_reg_inst, 24, 21) @[Rocket.scala 713:52]
node _T_3880 = mux(_T_3877, _T_3878, _T_3879) @[Rocket.scala 713:19]
node _T_3881 = mux(_T_3874, _T_3875, _T_3880) @[Rocket.scala 712:19]
node _T_3882 = mux(_T_3868, UInt<1>("h00"), _T_3881) @[Rocket.scala 711:19]