TDO output enable does not have asynchronous reset

[kkamundsen]

Type of issue: bug report

Impact: unknown

Development Phase: request

Other information
The tdoeReg in the JTAG module of the rocket chip does not have an asynchronous reset. This will lead to TDO being driven on some devices and floating on some devices. In a production test environment for the silicon device implementing the rocket chip, it is very nice if all pins are either driven or floating. Otherwise this will cause headaches in pin leakage and latch-up testing. In my opinion TDO should be set to floating when the rocket chip is asynchronously reset at power up.

Further contributing to the issue is that tdoreg is also not resetted, such that when TDO is driven you do not know if it is driven to zero or one. If tdoeReg was changed to being asynchronously reset to floating, this will not be an issue.

If the current behavior is a bug, please provide the steps to reproduce the problem:
In the verilog simulation of the rocket chip, the tdoeReg does not have an asynchronous reset. This can be seen in the simulations where this register gets a random value assigned in the very beginning. If searching for tdoeReg in the verilog code, one can see that there is no asynchronous reset for this register.

[hcook]

Closed by #2167
Thanks for your report.