-
Notifications
You must be signed in to change notification settings - Fork 31
/
SimpleIOModule.fir
105 lines (103 loc) · 7.42 KB
/
SimpleIOModule.fir
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
;buildInfoPackage: chisel3, version: 3.0-SNAPSHOT, scalaVersion: 2.11.11, sbtVersion: 0.13.16, builtAtString: 2017-09-16 03:49:13.973, builtAtMillis: 1505533753973
circuit SimpleIOModule :
module SimpleIOModule :
input clock : Clock
input reset : UInt<1>
output io : {flip i : {b : UInt<1>, cGenL : {real : Fixed<16><<8>>, imag : Fixed<16><<8>>}, cFS : {real : Fixed<8><<4>>, imag : Fixed<8><<4>>}, short : {gen : Fixed<8><<4>>, s : SInt<8>, f : Fixed<8><<4>>, u : UInt<8>}, long : {gen : Fixed<16><<8>>, s : SInt<16>, f : Fixed<16><<8>>, u : UInt<16>}, vU : UInt<8>[10], vS : SInt<8>[10], vF : Fixed<8><<4>>[10]}, o : {b : UInt<1>, cGenL : {real : Fixed<16><<8>>, imag : Fixed<16><<8>>}, cFS : {real : Fixed<8><<4>>, imag : Fixed<8><<4>>}, short : {gen : Fixed<8><<4>>, s : SInt<8>, f : Fixed<8><<4>>, u : UInt<8>}, long : {gen : Fixed<16><<8>>, s : SInt<16>, f : Fixed<16><<8>>, u : UInt<16>}, vU : UInt<8>[10], vS : SInt<8>[10], vF : Fixed<8><<4>>[10]}}
clock is invalid
reset is invalid
io is invalid
reg _T_49 : {gen : Fixed<8><<4>>, s : SInt<8>, f : Fixed<8><<4>>, u : UInt<8>}, clock @[SimpleTBwGenTypeOption.scala 121:23]
_T_49.u <= io.i.short.u @[SimpleTBwGenTypeOption.scala 121:23]
_T_49.f <= io.i.short.f @[SimpleTBwGenTypeOption.scala 121:23]
_T_49.s <= io.i.short.s @[SimpleTBwGenTypeOption.scala 121:23]
_T_49.gen <= io.i.short.gen @[SimpleTBwGenTypeOption.scala 121:23]
io.o.long.u <= _T_49.u @[SimpleTBwGenTypeOption.scala 121:13]
io.o.long.f <= _T_49.f @[SimpleTBwGenTypeOption.scala 121:13]
io.o.long.s <= _T_49.s @[SimpleTBwGenTypeOption.scala 121:13]
io.o.long.gen <= _T_49.gen @[SimpleTBwGenTypeOption.scala 121:13]
reg _T_51 : {gen : Fixed<16><<8>>, s : SInt<16>, f : Fixed<16><<8>>, u : UInt<16>}, clock @[SimpleTBwGenTypeOption.scala 122:24]
_T_51.u <= io.i.long.u @[SimpleTBwGenTypeOption.scala 122:24]
_T_51.f <= io.i.long.f @[SimpleTBwGenTypeOption.scala 122:24]
_T_51.s <= io.i.long.s @[SimpleTBwGenTypeOption.scala 122:24]
_T_51.gen <= io.i.long.gen @[SimpleTBwGenTypeOption.scala 122:24]
io.o.short.u <= _T_51.u @[SimpleTBwGenTypeOption.scala 122:14]
io.o.short.f <= _T_51.f @[SimpleTBwGenTypeOption.scala 122:14]
io.o.short.s <= _T_51.s @[SimpleTBwGenTypeOption.scala 122:14]
io.o.short.gen <= _T_51.gen @[SimpleTBwGenTypeOption.scala 122:14]
reg _T_53 : UInt<1>, clock @[SimpleTBwGenTypeOption.scala 125:20]
_T_53 <= io.i.b @[SimpleTBwGenTypeOption.scala 125:20]
io.o.b <= _T_53 @[SimpleTBwGenTypeOption.scala 125:10]
reg _T_59 : {real : Fixed<16><<8>>, imag : Fixed<16><<8>>}, clock @[SimpleTBwGenTypeOption.scala 126:24]
_T_59.imag <= io.i.cGenL.imag @[SimpleTBwGenTypeOption.scala 126:24]
_T_59.real <= io.i.cGenL.real @[SimpleTBwGenTypeOption.scala 126:24]
io.o.cGenL.imag <= _T_59.imag @[SimpleTBwGenTypeOption.scala 126:14]
io.o.cGenL.real <= _T_59.real @[SimpleTBwGenTypeOption.scala 126:14]
reg _T_65 : {real : Fixed<8><<4>>, imag : Fixed<8><<4>>}, clock @[SimpleTBwGenTypeOption.scala 127:22]
_T_65.imag <= io.i.cFS.imag @[SimpleTBwGenTypeOption.scala 127:22]
_T_65.real <= io.i.cFS.real @[SimpleTBwGenTypeOption.scala 127:22]
io.o.cFS.imag <= _T_65.imag @[SimpleTBwGenTypeOption.scala 127:12]
io.o.cFS.real <= _T_65.real @[SimpleTBwGenTypeOption.scala 127:12]
reg _T_79 : UInt<8>[10], clock @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[0] <= io.i.vU[0] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[1] <= io.i.vU[1] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[2] <= io.i.vU[2] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[3] <= io.i.vU[3] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[4] <= io.i.vU[4] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[5] <= io.i.vU[5] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[6] <= io.i.vU[6] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[7] <= io.i.vU[7] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[8] <= io.i.vU[8] @[SimpleTBwGenTypeOption.scala 130:21]
_T_79[9] <= io.i.vU[9] @[SimpleTBwGenTypeOption.scala 130:21]
io.o.vU[0] <= _T_79[0] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[1] <= _T_79[1] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[2] <= _T_79[2] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[3] <= _T_79[3] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[4] <= _T_79[4] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[5] <= _T_79[5] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[6] <= _T_79[6] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[7] <= _T_79[7] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[8] <= _T_79[8] @[SimpleTBwGenTypeOption.scala 130:11]
io.o.vU[9] <= _T_79[9] @[SimpleTBwGenTypeOption.scala 130:11]
reg _T_116 : SInt<8>[10], clock @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[0] <= io.i.vS[0] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[1] <= io.i.vS[1] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[2] <= io.i.vS[2] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[3] <= io.i.vS[3] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[4] <= io.i.vS[4] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[5] <= io.i.vS[5] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[6] <= io.i.vS[6] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[7] <= io.i.vS[7] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[8] <= io.i.vS[8] @[SimpleTBwGenTypeOption.scala 131:21]
_T_116[9] <= io.i.vS[9] @[SimpleTBwGenTypeOption.scala 131:21]
io.o.vS[0] <= _T_116[0] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[1] <= _T_116[1] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[2] <= _T_116[2] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[3] <= _T_116[3] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[4] <= _T_116[4] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[5] <= _T_116[5] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[6] <= _T_116[6] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[7] <= _T_116[7] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[8] <= _T_116[8] @[SimpleTBwGenTypeOption.scala 131:11]
io.o.vS[9] <= _T_116[9] @[SimpleTBwGenTypeOption.scala 131:11]
reg _T_153 : Fixed<8><<4>>[10], clock @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[0] <= io.i.vF[0] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[1] <= io.i.vF[1] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[2] <= io.i.vF[2] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[3] <= io.i.vF[3] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[4] <= io.i.vF[4] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[5] <= io.i.vF[5] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[6] <= io.i.vF[6] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[7] <= io.i.vF[7] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[8] <= io.i.vF[8] @[SimpleTBwGenTypeOption.scala 132:21]
_T_153[9] <= io.i.vF[9] @[SimpleTBwGenTypeOption.scala 132:21]
io.o.vF[0] <= _T_153[0] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[1] <= _T_153[1] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[2] <= _T_153[2] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[3] <= _T_153[3] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[4] <= _T_153[4] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[5] <= _T_153[5] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[6] <= _T_153[6] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[7] <= _T_153[7] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[8] <= _T_153[8] @[SimpleTBwGenTypeOption.scala 132:11]
io.o.vF[9] <= _T_153[9] @[SimpleTBwGenTypeOption.scala 132:11]