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Unwanted space in "default :", should be "default:" #20

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fangism opened this issue Nov 23, 2019 · 2 comments
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Unwanted space in "default :", should be "default:" #20

fangism opened this issue Nov 23, 2019 · 2 comments
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formatter Verilog code formatter issues good first issue Good for newcomers
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SV formatter

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fangism commented Nov 23, 2019

The following input:

function f;
case (x)
default :;  // this line, note spacing
endcase
endfunction

should really be formatted to:

function f;
  case (x)
    default: ;  // this line, note spacing
  endcase
endfunction

There are two spacing issues, this one is about spacing between 'default' and ':'.
@fangism fangism added good first issue Good for newcomers formatter Verilog code formatter issues labels Nov 23, 2019
@fangism fangism self-assigned this Nov 23, 2019
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fangism commented Nov 23, 2019

b/144874875

@fangism fangism added this to Inter-token (horizontal) spacing in SV formatter Nov 23, 2019
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fangism commented Dec 2, 2019

fixed by 8ab6d9b

@fangism fangism closed this as completed Dec 2, 2019
@hzeller hzeller mentioned this issue Oct 25, 2021
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formatter Verilog code formatter issues good first issue Good for newcomers
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SV formatter
Inter-token (horizontal) spacing
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