Name		Name	Last commit message	Last commit date
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verilog		verilog
README.md		README.md
lpf.mod		lpf.mod
lpf_tb.cir		lpf_tb.cir

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Verilog / SPICE co-simulation

This is based on the tutorial from https://www.isotel.eu/mixedsim/intro/prssine.html

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verilog and SPICE co-similation

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