Skip to content

Commit

Permalink
Merge pull request #4 from danielhrisca/master
Browse files Browse the repository at this point in the history
using flatten utility function breaks Eth communication
  • Loading branch information
christoph2 committed Dec 13, 2018
2 parents b4105b8 + d6da09a commit 6e0ce22
Show file tree
Hide file tree
Showing 4 changed files with 40 additions and 47 deletions.
19 changes: 6 additions & 13 deletions pyxcp/master.py
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,6 @@

from pyxcp import checksum
from pyxcp import types
from pyxcp.utils import flatten

class Master(object):

Expand Down Expand Up @@ -252,16 +251,14 @@ def downloadMax(self, *data):
def shortDownload(self, address, addressExt, *data):
length = len(data)
addr = struct.pack("<I", address)
#response = self.transport.request(types.Command.SHORT_DOWNLOAD, length, 0, addressExt, *addr, *data)
response = self.transport.request(types.Command.SHORT_DOWNLOAD, length, 0, addressExt, flatten(addr, data))
response = self.transport.request(types.Command.SHORT_DOWNLOAD, length, 0, addressExt, *addr, *data)
return response

def modifyBits(self, shiftValue, andMask, xorMask):
# A = ( (A) & ((~((dword)(((word)~MA)<<S))) )^((dword)(MX<<S)) )
am = struct.pack("<H", andMask)
xm = struct.pack("<H", xorMask)
#response = self.transport.request(types.Command.MODIFY_BITS, shiftValue, *am, *xm)
response = self.transport.request(types.Command.MODIFY_BITS, shiftValue, flatten(am, xm))
response = self.transport.request(types.Command.MODIFY_BITS, shiftValue, *am, *xm)
return response

##
Expand Down Expand Up @@ -314,8 +311,7 @@ def clearDaqList(self, daqListNumber):

def setDaqPtr(self, daqListNumber, odtNumber, odtEntryNumber):
daqList = struct.pack("<H", daqListNumber)
#response = self.transport.request(types.Command.SET_DAQ_PTR, 0, *daqList, odtNumber, odtEntryNumber)
response = self.transport.request(types.Command.SET_DAQ_PTR, 0, flatten(daqList), odtNumber, odtEntryNumber)
response = self.transport.request(types.Command.SET_DAQ_PTR, 0, *daqList, odtNumber, odtEntryNumber)
return response

def writeDaq(self, bitOffset, entrySize, addressExt, address):
Expand All @@ -326,8 +322,7 @@ def writeDaq(self, bitOffset, entrySize, addressExt, address):
def setDaqListMode(self, mode, daqListNumber, eventChannelNumber, prescaler, priority):
dln = struct.pack("<H", daqListNumber)
ecn = struct.pack("<H", eventChannelNumber)
#response = self.transport.request(types.Command.SET_DAQ_LIST_MODE, mode, *dln, *ecn, prescaler, priority)
response = self.transport.request(types.Command.SET_DAQ_LIST_MODE, mode, flatten(dln, ecn), prescaler, priority)
response = self.transport.request(types.Command.SET_DAQ_LIST_MODE, mode, *dln, *ecn, prescaler, priority)
return response

def getDaqListMode(self, daqListNumber):
Expand Down Expand Up @@ -384,14 +379,12 @@ def allocDaq(self, daqCount):

def allocOdt(self, daqListNumber, odtCount):
dln = struct.pack("<H", daqListNumber)
#response = self.transport.request(types.Command.ALLOC_ODT, 0, *dln, odtCount)
response = self.transport.request(types.Command.ALLOC_ODT, 0, flatten(dln), odtCount)
response = self.transport.request(types.Command.ALLOC_ODT, 0, *dln, odtCount)
return response

def allocOdtEntry(self, daqListNumber, odtNumber, odtEntriesCount):
dln = struct.pack("<H", daqListNumber)
#response = self.transport.request(types.Command.ALLOC_ODT_ENTRY, 0, *dln, odtNumber, odtEntriesCount)
response = self.transport.request(types.Command.ALLOC_ODT_ENTRY, 0, flatten(dln), odtNumber, odtEntriesCount)
response = self.transport.request(types.Command.ALLOC_ODT_ENTRY, 0, *dln, odtNumber, odtEntriesCount)
return response

##
Expand Down
2 changes: 1 addition & 1 deletion pyxcp/version.py
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
# -*- coding: utf-8 -*-
""" pyxcp version module """

__version__ = "0.10.0"
__version__ = "0.10.1"
64 changes: 32 additions & 32 deletions pyxcp/xcptest.py
Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,7 @@ def timecode(ticks, mode):


def cstest():
tr = transport.Eth('localhost', port= 5555, connected = False, loglevel = "WARN") # "DEBUG"
tr = transport.Eth('localhost', port= 5555, protocol = TCP', loglevel = "WARN") # "DEBUG"
#tr = transport.SxI("COM27", 115200, loglevel = "WARN")
with Master(tr) as xm:
# tm = Timing()
Expand Down Expand Up @@ -632,37 +632,37 @@ def startMeasurement(cl):
ALLOC_ODT_ENTRY daq=1 odt=1 count=1
SET_DAQ_PTR daq=0 odt=0 entry=0
WRITE_DAQ bitoff=255 size=2 ext=0 addr=001BE068h
SET_DAQ_PTR daq=0 odt=1 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE06Ah
SET_DAQ_PTR daq=0 odt=2 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE070h
SET_DAQ_PTR daq=0 odt=3 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE076h
SET_DAQ_PTR daq=0 odt=4 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE07Ch
SET_DAQ_PTR daq=0 odt=5 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE082h
SET_DAQ_PTR daq=0 odt=6 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE088h
SET_DAQ_PTR daq=0 odt=7 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE08Eh
SET_DAQ_PTR daq=0 odt=8 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE094h
SET_DAQ_PTR daq=0 odt=9 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE09Ah
SET_DAQ_PTR daq=0 odt=10 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE0A0h
SET_DAQ_PTR daq=0 odt=11 entry=0
WRITE_DAQ bitoff=255 size=2 ext=0 addr=001BE0A6h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE0CFh
WRITE_DAQ bitoff=255 size=3 ext=0 addr=001BE234h
SET_DAQ_PTR daq=0 odt=12 entry=0
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE237h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE24Fh
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE269h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE5A3h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001C0003h
WRITE_DAQ bitoff=255 size=2 ext=0 addr=001BE068h
SET_DAQ_PTR daq=0 odt=1 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE06Ah
SET_DAQ_PTR daq=0 odt=2 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE070h
SET_DAQ_PTR daq=0 odt=3 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE076h
SET_DAQ_PTR daq=0 odt=4 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE07Ch
SET_DAQ_PTR daq=0 odt=5 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE082h
SET_DAQ_PTR daq=0 odt=6 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE088h
SET_DAQ_PTR daq=0 odt=7 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE08Eh
SET_DAQ_PTR daq=0 odt=8 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE094h
SET_DAQ_PTR daq=0 odt=9 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE09Ah
SET_DAQ_PTR daq=0 odt=10 entry=0
WRITE_DAQ bitoff=255 size=6 ext=0 addr=001BE0A0h
SET_DAQ_PTR daq=0 odt=11 entry=0
WRITE_DAQ bitoff=255 size=2 ext=0 addr=001BE0A6h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE0CFh
WRITE_DAQ bitoff=255 size=3 ext=0 addr=001BE234h
SET_DAQ_PTR daq=0 odt=12 entry=0
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE237h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE24Fh
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE269h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001BE5A3h
WRITE_DAQ bitoff=255 size=1 ext=0 addr=001C0003h
SET_DAQ_PTR daq=1 odt=0 entry=0
WRITE_DAQ bitoff=255 size=2 ext=0 addr=001C002Ch
SET_DAQ_PTR daq=1 odt=1 entry=0
Expand Down
2 changes: 1 addition & 1 deletion requirements.txt
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
enum34
construct == 2.8.17
construct>=2.8
mako
pyserial
numpydoc
Expand Down

0 comments on commit 6e0ce22

Please sign in to comment.