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added 540p
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@chriz2600
chriz2600 committed Feb 9, 2022
1 parent 8a7edae commit add7274
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Showing 7 changed files with 98 additions and 19 deletions.
2 changes: 1 addition & 1 deletion build
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Expand Up @@ -3,7 +3,7 @@
cd $(dirname $0)

mkdir -p source/generated
if [ ! -f source/generated/slots.v ] ; then echo -e '`define SLOT1 `MODE_1080p60\n`define SLOT2 `MODE_1080i60\n`define SLOT3 `MODE_720p60\n`define SLOT4 `MODE_480p60\n`define SLOT5 `MODE_480i60\n' > source/generated/slots.v ; fi
if [ ! -f source/generated/slots.v ] ; then echo -e '`define SLOT1 `MODE_1080p60\n`define SLOT2 `MODE_1080i60\n`define SLOT3 `MODE_720p60\n`define SLOT4 `MODE_480p60\n`define SLOT5 `MODE_540p60\n' > source/generated/slots.v ; fi

cat source/generated/slots.v | grep '`define SLOT' | ./prepare-modes.pl > source/generated/video-modes.v

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11 changes: 11 additions & 0 deletions create-svf
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@@ -0,0 +1,11 @@
#!/bin/bash

cd $(dirname $0)

source .setup

docker_run quartus_cpf -c -q 2MHz -g 3.3 -n p output_files/lagtester.pof output_files/lagtester.svf

if [ "$1" == "program" ] ; then
openocd -f interface/altera-usb-blaster.cfg -c init -c "svf -quiet output_files/lagtester.svf" -c shutdown
fi
19 changes: 19 additions & 0 deletions source/char_rom/font/predef/540p60.v
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@@ -0,0 +1,19 @@
// 540p 60Hz
case (addr)
00: q_reg <= 80'b_00000000000000000000000000000000000000000000000000000000000000000000000000000000;
01: q_reg <= 80'b_00000000000000000000000000000000000000000000000000000000000000000000000000000000;
02: q_reg <= 80'b_00000000011111100000100000111100000000000000000000111100001111000100001000000000;
03: q_reg <= 80'b_00000000010000000000100001000010000000000000000001000000010000100100001000000000;
04: q_reg <= 80'b_00000000010000000001100001000010000000000000000001000000010000100100001000000000;
05: q_reg <= 80'b_00000000010000000001100001000110011110000000000001000000010001100100001001111100;
06: q_reg <= 80'b_00000000011111000010100001001010010001000000000001111100010010100111111000000100;
07: q_reg <= 80'b_00000000000000100010100001010010010001000000000001000010010100100100001000000100;
08: q_reg <= 80'b_00000000000000100100100001100010010001000000000001000010011000100100001000001000;
09: q_reg <= 80'b_00000000000000100100100001000010010001000000000001000010010000100100001000010000;
10: q_reg <= 80'b_00000000000000100111111001000010010001000000000001000010010000100100001000100000;
11: q_reg <= 80'b_00000000010000100000100001000010010001000000000001000010010000100100001001000000;
12: q_reg <= 80'b_00000000001111000000100000111100011110000000000000111100001111000100001001111100;
13: q_reg <= 80'b_00000000000000000000000000000000010000000000000000000000000000000000000000000000;
14: q_reg <= 80'b_00000000000000000000000000000000010000000000000000000000000000000000000000000000;
15: q_reg <= 80'b_00000000000000000000000000000000010000000000000000000000000000000000000000000000;
endcase
1 change: 1 addition & 0 deletions source/char_rom/resolution.v
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Expand Up @@ -28,6 +28,7 @@ module resolution(
`MODE_1080i50: begin `include "font/predef/1080i50.v" end
`MODE_720p50: begin `include "font/predef/720p50.v" end
`MODE_900p60: begin `include "font/predef/900p60.v" end
`MODE_540p60: begin `include "font/predef/540p60.v" end
endcase
end

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46 changes: 46 additions & 0 deletions source/config/video_modes.v
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Expand Up @@ -782,3 +782,49 @@ const VideoMode VIDEO_MODE_900P60 = {
12'd_107 + (12'd_48 << 2), // v_lag_line3
12'd_107 + (12'd_64 << 2) // v_lag_line4
};

const VideoMode VIDEO_MODE_540P60 = {
`MODE_540p60, // id
12'd_2200, // h_total
12'd_1920, // h_active
12'd_88, // h_front_porch
12'd_44, // h_sync
12'd_148, // h_back_porch
1'b_1, // h_sync_pol

12'd_540, // v_active
12'd_2, // v_front_porch
12'd_5, // v_sync

12'd_562, // v_total_1
12'd_15, // v_back_porch_1
12'd_0, // v_pxl_offset_1

12'd_562, // v_total_2
12'd_15, // v_back_porch_2
12'd_0, // v_pxl_offset_2

1'b_1, // v_sync_pol

12'd_600, // h_field_width
12'd_0, // v_field1_start
12'd_45, // v_field1_end
12'd_247, // v_field2_start
12'd_292, // v_field2_end
12'd_495, // v_field3_start
12'd_540, // v_field3_end

4'd_2, // h_lag_divider
4'd_1, // v_lag_divider
12'd_160, // h_lag_start
12'd_160 + `LL_END1, // h_lag_end1
12'd_160 + `LL_END2, // h_lag_end2
12'd_160 + `LL_END3, // h_lag_end3
12'd_160 + `LL_END4, // h_lag_end4

12'd_69, // v_lag_start
12'd_69 + (12'd_16 << 1), // v_lag_line1
12'd_69 + (12'd_32 << 1), // v_lag_line2
12'd_69 + (12'd_48 << 1), // v_lag_line3
12'd_69 + (12'd_64 << 1) // v_lag_line4
};
37 changes: 19 additions & 18 deletions source/defines.v
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Expand Up @@ -2,24 +2,25 @@
`define DEFINES_VH

////////////////////////////////
`define MODE_SIZE 17
`define MODE_1080p60 `MODE_SIZE'b_0_0000_0000_0000_0001
`define MODE_1080i60 `MODE_SIZE'b_0_0000_0000_0000_0010
`define MODE_720p60 `MODE_SIZE'b_0_0000_0000_0000_0100
`define MODE_480p60 `MODE_SIZE'b_0_0000_0000_0000_1000
`define MODE_480i60 `MODE_SIZE'b_0_0000_0000_0001_0000
`define MODE_240p60 `MODE_SIZE'b_0_0000_0000_0010_0000
`define MODE_VGA `MODE_SIZE'b_0_0000_0000_0100_0000
`define MODE_960p60 `MODE_SIZE'b_0_0000_0000_1000_0000
`define MODE_576p50 `MODE_SIZE'b_0_0000_0001_0000_0000
`define MODE_576i50 `MODE_SIZE'b_0_0000_0010_0000_0000
`define MODE_288p50 `MODE_SIZE'b_0_0000_0100_0000_0000
`define MODE_WUXGA `MODE_SIZE'b_0_0000_1000_0000_0000
`define MODE_UXGA `MODE_SIZE'b_0_0001_0000_0000_0000
`define MODE_1080p50 `MODE_SIZE'b_0_0010_0000_0000_0000
`define MODE_1080i50 `MODE_SIZE'b_0_0100_0000_0000_0000
`define MODE_720p50 `MODE_SIZE'b_0_1000_0000_0000_0000
`define MODE_900p60 `MODE_SIZE'b_1_0000_0000_0000_0000
`define MODE_SIZE 18
`define MODE_1080p60 `MODE_SIZE'b_00_0000_0000_0000_0001
`define MODE_1080i60 `MODE_SIZE'b_00_0000_0000_0000_0010
`define MODE_720p60 `MODE_SIZE'b_00_0000_0000_0000_0100
`define MODE_480p60 `MODE_SIZE'b_00_0000_0000_0000_1000
`define MODE_480i60 `MODE_SIZE'b_00_0000_0000_0001_0000
`define MODE_240p60 `MODE_SIZE'b_00_0000_0000_0010_0000
`define MODE_VGA `MODE_SIZE'b_00_0000_0000_0100_0000
`define MODE_960p60 `MODE_SIZE'b_00_0000_0000_1000_0000
`define MODE_576p50 `MODE_SIZE'b_00_0000_0001_0000_0000
`define MODE_576i50 `MODE_SIZE'b_00_0000_0010_0000_0000
`define MODE_288p50 `MODE_SIZE'b_00_0000_0100_0000_0000
`define MODE_WUXGA `MODE_SIZE'b_00_0000_1000_0000_0000
`define MODE_UXGA `MODE_SIZE'b_00_0001_0000_0000_0000
`define MODE_1080p50 `MODE_SIZE'b_00_0010_0000_0000_0000
`define MODE_1080i50 `MODE_SIZE'b_00_0100_0000_0000_0000
`define MODE_720p50 `MODE_SIZE'b_00_1000_0000_0000_0000
`define MODE_900p60 `MODE_SIZE'b_01_0000_0000_0000_0000
`define MODE_540p60 `MODE_SIZE'b_10_0000_0000_0000_0000
////////////////////////////////
`define MAX_BCDCOUNT 20'h_9_99_99
// clock.frquency / CLOCK_DIVIDER = 100kHz
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1 change: 1 addition & 0 deletions source/pll/pll_reconf_rom.v
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Expand Up @@ -60,6 +60,7 @@ module pll_reconf_rom (
`MODE_1080i50: begin `include "config/74_25_MHz.v" end
`MODE_720p50: begin `include "config/74_25_MHz.v" end
`MODE_900p60: begin `include "config/108_MHz.v" end
`MODE_540p60: begin `include "config/74_25_MHz.v" end
endcase

// delay output, to match ROM based timing
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