OpenVC, an open source VHDL compiler/simulator.
To compile the project start the sbt console (use sbt.sh or sbt.bat) and run the compile command.
- Conditional variable assignments
- Selected variable assignments
- Conditional signal assignments
- Selected signal assignments
- unary logical operators e.g. logical reduction operators
- Condition operator
- matching relational operator
- Context declarations
- improved bit string literals
- block comments (C-style comments /* */)