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clash-compiler
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2023-07-05T16_49_21+02_00_diffclock

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clash-compiler
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2023-07-05T16_49_21+02_00_diffclock

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ADDED: A new clock type `DiffClock` is introduced to signify a differential

clock signal that is passed to the design on two ports in antiphase. This is

used by the differential Xilinx clock wizards in `Clash.Xilinx.ClockGen`.

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