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Layer1 unpacker and DQM modified for HCALFB
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hftsoi committed Mar 10, 2023
1 parent 3d761d8 commit 9968a15
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Showing 7 changed files with 1,326 additions and 81 deletions.
206 changes: 140 additions & 66 deletions DQM/L1TMonitor/src/L1TStage2CaloLayer1.cc
Expand Up @@ -66,6 +66,8 @@ void L1TStage2CaloLayer1::dqmAnalyze(const edm::Event& event,
edm::Handle<FEDRawDataCollection> fedRawDataCollection;
event.getByToken(fedRawData_, fedRawDataCollection);
bool caloLayer1OutOfRun{true};
bool FATevent{false};
bool additionalFB{false};
if (fedRawDataCollection.isValid()) {
caloLayer1OutOfRun = false;
for (int iFed = 1354; iFed < 1360; iFed += 2) {
Expand All @@ -78,6 +80,9 @@ void L1TStage2CaloLayer1::dqmAnalyze(const edm::Event& event,
UCTDAQRawData daqData(fedRawDataArray);
for (uint32_t i = 0; i < daqData.nAMCs(); i++) {
UCTAMCRawData amcData(daqData.amcPayload(i));
const uint32_t* amcPtr = amcData.dataPtr();
FATevent = ((amcPtr[5] >> 16) & 0xf) == 5;
additionalFB = (amcPtr[5] >> 15) & 0x1;
int lPhi = amcData.layer1Phi();
if (daqData.BXID() != amcData.BXID()) {
eventMonitors.bxidErrors_->Fill(lPhi);
Expand Down Expand Up @@ -335,6 +340,33 @@ void L1TStage2CaloLayer1::dqmAnalyze(const edm::Event& event,
eventMonitors.hcalOccSent_->Fill(ieta, iphi);
}

// 6 HCAL fine grain bits from uHTR readout
bool uHTRfg0 = sentTp.SOI_fineGrain(0);
bool uHTRfg1 = sentTp.SOI_fineGrain(1);
bool uHTRfg2 = sentTp.SOI_fineGrain(2);
bool uHTRfg3 = sentTp.SOI_fineGrain(3);
bool uHTRfg4 = sentTp.SOI_fineGrain(4);
bool uHTRfg5 = sentTp.SOI_fineGrain(5);

if (uHTRfg0) {
eventMonitors.hcalOccSentFg0_->Fill(ieta, iphi);
}
if (uHTRfg1) {
eventMonitors.hcalOccSentFg1_->Fill(ieta, iphi);
}
if (uHTRfg2) {
eventMonitors.hcalOccSentFg2_->Fill(ieta, iphi);
}
if (uHTRfg3) {
eventMonitors.hcalOccSentFg3_->Fill(ieta, iphi);
}
if (uHTRfg4) {
eventMonitors.hcalOccSentFg4_->Fill(ieta, iphi);
}
if (uHTRfg5) {
eventMonitors.hcalOccSentFg5_->Fill(ieta, iphi);
}

if (towerMasked || caloLayer1OutOfRun) {
// Do not compare if we have a mask applied
continue;
Expand All @@ -348,92 +380,116 @@ void L1TStage2CaloLayer1::dqmAnalyze(const edm::Event& event,
continue;
}

// HCAL LLP trigger feature bits monitoring
// 6 HCAL fine grain bits from Layer1 readout
// Fg 0 is always there in ctp7 payload, set as bit 8 after Et bits in unpacked towerDatum
// When additionalFB flag is set:
// Fg 1-5 are unpacked and set as bits 0-5 in another unpacked towerDatum2 and packed in HCALTP sample(1)
// since standard sample size is 16bit and there is no room in sample(0) which contains already Et and link status
// Otherwise:
// Fg 1-5 are all zero
bool layer1fg0 = recdTp.SOI_fineGrain(0);
bool layer1fg1 = false;
bool layer1fg2 = false;
bool layer1fg3 = false;
bool layer1fg4 = false;
bool layer1fg5 = false;
if (additionalFB && (abs(ieta) < 29)) {
for (const auto& tp : (*hcalTPsRecd)) {
if (not(tp.id().ieta() == ieta && tp.id().iphi() == iphi)) {
continue;
}
layer1fg1 = tp.sample(1).raw() & (1 << 0);
layer1fg2 = tp.sample(1).raw() & (1 << 1);
layer1fg3 = tp.sample(1).raw() & (1 << 2);
layer1fg4 = tp.sample(1).raw() & (1 << 3);
layer1fg5 = tp.sample(1).raw() & (1 << 4);
}
}

// Check mismatches only for HBHE
const bool Hfg0Agreement = (abs(ieta) < 29) ? (layer1fg0 == uHTRfg0) : true;
const bool Hfg1Agreement = (abs(ieta) < 29) ? (layer1fg1 == uHTRfg1) : true;
const bool Hfg2Agreement = (abs(ieta) < 29) ? (layer1fg2 == uHTRfg2) : true;
const bool Hfg3Agreement = (abs(ieta) < 29) ? (layer1fg3 == uHTRfg3) : true;
const bool Hfg4Agreement = (abs(ieta) < 29) ? (layer1fg4 == uHTRfg4) : true;
const bool Hfg5Agreement = (abs(ieta) < 29) ? (layer1fg5 == uHTRfg5) : true;
// Mute fg4 and fg5 for now (reserved bits not used anyway)
const bool HfgAgreement = (Hfg0Agreement && Hfg1Agreement && Hfg2Agreement && Hfg3Agreement);

// Construct an 6-bit integer from the layer1 fine grain readout (input to 6:1 logic emulation)
uint64_t fg_bits = 0;
if (layer1fg0) {
fg_bits |= 0x1;
}
if (layer1fg1) {
fg_bits |= 0x1 << 1;
}
if (layer1fg2) {
fg_bits |= 0x1 << 2;
}
if (layer1fg3) {
fg_bits |= 0x1 << 3;
}
if (layer1fg4) {
fg_bits |= 0x1 << 4;
}
if (layer1fg5) {
fg_bits |= 0x1 << 5;
}

// Current 6:1 LUT in fw
const uint64_t HCalFbLUT = 0xBBBABBBABBBABBBA;
// Expected LLP bit output (mute emulation for normal events, since layer2 only reads out FAT events)
const bool LLPfb_Expd = (FATevent == 1) ? ((HCalFbLUT >> fg_bits) & 1) : false;
// Actual LLP bit output in layer2 data collection
uint32_t tower_hwqual = 0;
for (auto tower = caloTowerDataCol->begin(0); tower != caloTowerDataCol->end(0); ++tower) {
if (not(tower->hwEta() == ieta && tower->hwPhi() == iphi)) {
continue;
}
tower_hwqual = tower->hwQual();
}
// CaloTower hwQual is 4-bit long, LLP output bit is set at the 2nd bit (counting from 0)
const bool LLPfb_Data = ((tower_hwqual & 0b0100) >> 2) & 1;

const bool LLPfbAgreement = (abs(ieta) < 29) ? (LLPfb_Expd == LLPfb_Data) : true;

// Fill feature bits Occ for HBHE only
if (abs(ieta) < 29) {
// Input feature bits readout at uHTR vs. Layer1
if (recdTp.SOI_fineGrain(0)) {
if (layer1fg0) {
eventMonitors.hcalOccRecdFg0_->Fill(ieta, iphi);
}
if (recdTp.SOI_fineGrain(1)) {
if (layer1fg1) {
eventMonitors.hcalOccRecdFg1_->Fill(ieta, iphi);
}
if (recdTp.SOI_fineGrain(2)) {
if (layer1fg2) {
eventMonitors.hcalOccRecdFg2_->Fill(ieta, iphi);
}
if (recdTp.SOI_fineGrain(3)) {
if (layer1fg3) {
eventMonitors.hcalOccRecdFg3_->Fill(ieta, iphi);
}
if (recdTp.SOI_fineGrain(4)) {
if (layer1fg4) {
eventMonitors.hcalOccRecdFg4_->Fill(ieta, iphi);
}
if (recdTp.SOI_fineGrain(5)) {
if (layer1fg5) {
eventMonitors.hcalOccRecdFg5_->Fill(ieta, iphi);
}
if (sentTp.SOI_fineGrain(0)) {
eventMonitors.hcalOccSentFg0_->Fill(ieta, iphi);
}
if (sentTp.SOI_fineGrain(1)) {
eventMonitors.hcalOccSentFg1_->Fill(ieta, iphi);
}
if (sentTp.SOI_fineGrain(2)) {
eventMonitors.hcalOccSentFg2_->Fill(ieta, iphi);
}
if (sentTp.SOI_fineGrain(3)) {
eventMonitors.hcalOccSentFg3_->Fill(ieta, iphi);
}
if (sentTp.SOI_fineGrain(4)) {
eventMonitors.hcalOccSentFg4_->Fill(ieta, iphi);
}
if (sentTp.SOI_fineGrain(5)) {
eventMonitors.hcalOccSentFg5_->Fill(ieta, iphi);
}
if (not(recdTp.SOI_fineGrain(0) == sentTp.SOI_fineGrain(0))) {
eventMonitors.hcalOccFg0Discrepancy_->Fill(ieta, iphi);
}
if (not(recdTp.SOI_fineGrain(1) == sentTp.SOI_fineGrain(1))) {
eventMonitors.hcalOccFg1Discrepancy_->Fill(ieta, iphi);
}
if (not(recdTp.SOI_fineGrain(2) == sentTp.SOI_fineGrain(2))) {
eventMonitors.hcalOccFg2Discrepancy_->Fill(ieta, iphi);
}
if (not(recdTp.SOI_fineGrain(3) == sentTp.SOI_fineGrain(3))) {
eventMonitors.hcalOccFg3Discrepancy_->Fill(ieta, iphi);
}
if (not(recdTp.SOI_fineGrain(4) == sentTp.SOI_fineGrain(4))) {
// fg4-5 are reserved bits and not used
// so compare here and not stream to mismatch list for now
if (not Hfg4Agreement) {
eventMonitors.hcalOccFg4Discrepancy_->Fill(ieta, iphi);
}
if (not(recdTp.SOI_fineGrain(5) == sentTp.SOI_fineGrain(5))) {
if (not Hfg5Agreement) {
eventMonitors.hcalOccFg5Discrepancy_->Fill(ieta, iphi);
}
// Construct a 6-bit integer from the 6 fine grain bits at uHTR (will change to at Layer1 readout later)
uint64_t fg_bits = 0;
for (int index = 0; index < 6; index++) {
fg_bits |= sentTp.SOI_fineGrain(index) << index;
}
// Current 6:1 LUT in fw
const uint64_t HCalFbLUT = 0xAAAAAAAAAAAAAAAA;
// Expected feature bit output
const bool fb_Expd = (HCalFbLUT >> fg_bits) & 1;
// Actual feature bit output in data
uint32_t tower_hwqual = 0;
for (auto tower = caloTowerDataCol->begin(0); tower != caloTowerDataCol->end(0); ++tower) {
if (not(tower->hwEta() == ieta && tower->hwPhi() == iphi)) {
continue;
}
tower_hwqual = tower->hwQual();
}
// CaloTower hwQual is 4-bit long, HCAL Fb is set at the 2nd bit (counting from 0)
const bool fb_Data = ((tower_hwqual & 0b0100) >> 2) & 1;
// Fill Fb Occ and compare between expected and data
if (fb_Expd) {
// Fill Fb Occ and compare between layer1 emulated and layer2 data readout
// FAT events only!!
if (LLPfb_Expd) {
eventMonitors.hcalOccLLPFbExpd_->Fill(ieta, iphi);
}
if (fb_Data) {
if (LLPfb_Data) {
eventMonitors.hcalOccLLPFbData_->Fill(ieta, iphi);
}
if (not(fb_Expd == fb_Data)) {
eventMonitors.hcalOccLLPFbDiscrepancy_->Fill(ieta, iphi);
}
}

if (recdTp.SOI_compressedEt() > tpFillThreshold_) {
Expand All @@ -449,7 +505,7 @@ void L1TStage2CaloLayer1::dqmAnalyze(const edm::Event& event,
}

const bool HetAgreement = sentTp.SOI_compressedEt() == recdTp.SOI_compressedEt();
if (HetAgreement) {
if (HetAgreement && HfgAgreement && LLPfbAgreement) {
// Full match
if (sentTp.SOI_compressedEt() > tpFillThreshold_) {
eventMonitors.hcalOccSentAndRecd_->Fill(ieta, iphi);
Expand Down Expand Up @@ -479,6 +535,24 @@ void L1TStage2CaloLayer1::dqmAnalyze(const edm::Event& event,
else
eventMonitors.hcalOccNoMatch_->Fill(ieta, iphi);
}
if (not(HfgAgreement && LLPfbAgreement)) {
if (not Hfg0Agreement) {
eventMonitors.hcalOccFg0Discrepancy_->Fill(ieta, iphi);
}
if (not Hfg1Agreement) {
eventMonitors.hcalOccFg1Discrepancy_->Fill(ieta, iphi);
}
if (not Hfg2Agreement) {
eventMonitors.hcalOccFg2Discrepancy_->Fill(ieta, iphi);
}
if (not Hfg3Agreement) {
eventMonitors.hcalOccFg3Discrepancy_->Fill(ieta, iphi);
}
if (not LLPfbAgreement) {
eventMonitors.hcalOccLLPFbDiscrepancy_->Fill(ieta, iphi);
}
updateMismatch(event, 3, streamCache(event.streamID())->streamMismatchList);
}
}
}

Expand Down
1 change: 1 addition & 0 deletions EventFilter/L1TRawToDigi/interface/Block.h
Expand Up @@ -185,6 +185,7 @@ namespace l1t {
unsigned capId_;
unsigned bx_per_l1a_;
unsigned calo_bxid_;
unsigned six_hcal_feature_bits_;
amc::Header amcHeader_;
};
} // namespace l1t
Expand Down

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