Skip to content

Commit

Permalink
merge
Browse files Browse the repository at this point in the history
  • Loading branch information
stuarthodgson committed Jul 17, 2013
2 parents 9061dcd + c73b220 commit d7bda44
Show file tree
Hide file tree
Showing 10 changed files with 156 additions and 10 deletions.
22 changes: 22 additions & 0 deletions cocotb/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,8 @@
scheduler = Scheduler()
regression = None

plusargs = {}

# To save typing provide an alias to scheduler.add
fork = scheduler.add

Expand Down Expand Up @@ -92,6 +94,9 @@ def _initialise_testbench(root_handle):

# Create the base handle type
dut = cocotb.handle.SimHandle(root_handle)

process_plusargs()

module_str = os.getenv('MODULE')
test_str = os.getenv('TESTCASE')

Expand All @@ -110,3 +115,20 @@ def _initialise_testbench(root_handle):
_rlock.release()
return True


def process_plusargs():

global plusargs

plusargs = {}

for option in cocotb.argv:
if option.startswith('+'):
if option.find('=') != -1:
(name, value) = option[1:].split('=')
plusargs[name] = value
else:
plusargs[option[1:]] = True

print plusargs

38 changes: 38 additions & 0 deletions examples/plusargs/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,38 @@
###############################################################################
# Copyright (c) 2013 Potential Ventures Ltd
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# * Neither the name of Potential Ventures Ltd nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL POTENTIAL VENTURES LTD BE LIABLE FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
###############################################################################


TOPLEVEL = tb_top

VERILOG_SOURCES = tb_top.v
MODULE=plusargs

PLUSARGS=+foo=bar +test1 +test2 +options=fubar

include ../../makefiles/Makefile.inc
include ../../makefiles/Makefile.sim

23 changes: 23 additions & 0 deletions examples/plusargs/plusargs.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
#!/bin/python

"""
plusarg testing
"""

import cocotb
from cocotb.decorators import coroutine
from cocotb.triggers import Timer, Edge, Event

import sys

@cocotb.test()
def plusargs_test(dut):
"""Demonstrates plusarg access from Python test"""

yield Timer(10000)

for name in cocotb.plusargs:
print name, cocotb.plusargs[name]

yield Timer(10000)

12 changes: 12 additions & 0 deletions examples/plusargs/tb_top.v
Original file line number Diff line number Diff line change
@@ -0,0 +1,12 @@
module tb_top ;

reg [1000:0] foo_string;
integer result;

initial begin
$display("Plusargs test");
result = $value$plusargs("foo=%s", foo_string);
$display("Plusarg foo has value %0s", foo_string);

end
endmodule //: tb_top
3 changes: 2 additions & 1 deletion include/embed.h
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,10 @@

#include <gpi.h>
#include <gpi_logging.h>
#include <vpi_user.h>

extern void embed_init_python(void);
extern void embed_sim_init(void);
extern void embed_sim_init(gpi_sim_info_t *info);
extern void embed_sim_end(void);

#endif /* COCOTB_EMBED_H_ */
9 changes: 9 additions & 0 deletions include/gpi.h
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,15 @@ we have to create a process with the signal on the sensitivity list to imitate a

EXTERN_C_START

typedef struct gpi_sim_info_s
{
int32_t argc;
char **argv;
char *product;
char *version;
int32_t *reserved[4];
} gpi_sim_info_t;

// Define a type for our simulation handle.
typedef struct gpi_sim_hdl_s {
void *sim_hdl;
Expand Down
10 changes: 9 additions & 1 deletion include/vpi_user.h
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,14 @@ typedef struct t_vpi_time
#define vpiSimTime 2
#define vpiSuppressTime 3

/* VPI Simulator information */
typedef struct t_vpi_vlog_info
{
int32_t argc;
char **argv;
char *product;
char *version;
} s_vpi_vlog_info, *p_vpi_vlog_info;

/* generic value */
typedef struct t_vpi_value
Expand Down Expand Up @@ -209,7 +217,7 @@ extern vpiHandle vpi_handle_by_multi_index(vpiHandle obj,



void (*vlog_startup_routines[])(void);
extern void (*vlog_startup_routines[])(void);

#ifdef __cplusplus
}
Expand Down
26 changes: 24 additions & 2 deletions lib/embed/gpi_embed.c
Original file line number Diff line number Diff line change
Expand Up @@ -98,10 +98,12 @@ int get_module_ref(const char *modname, PyObject **mod)
return 0;
}

void embed_sim_init(void)
void embed_sim_init(gpi_sim_info_t *info)
{
FENTER

int i;

// Find the simulation root
gpi_sim_hdl dut = gpi_get_root_handle(getenv("TOPLEVEL"));

Expand All @@ -112,6 +114,7 @@ void embed_sim_init(void)

PyObject *cocotb_module, *cocotb_init, *cocotb_args, *cocotb_retval;
PyObject *simlog_class, *simlog_obj, *simlog_args, *simlog_func;
PyObject *argv_list, *argc, *arg_dict, *arg_value;


//Ensure that the current thread is ready to callthe Python C API
Expand Down Expand Up @@ -160,8 +163,25 @@ void embed_sim_init(void)

set_log_filter(simlog_func);

// Now that logging has been set up ok we initialise the testbench
argv_list = PyList_New(0);
for (i = 0; i < info->argc; i++) {
arg_value = PyString_FromString(info->argv[i]);
PyList_Append(argv_list, arg_value);
}

arg_dict = PyModule_GetDict(cocotb_module);
PyDict_SetItemString(arg_dict, "argv", argv_list);

argc = PyInt_FromLong(info->argc);
PyDict_SetItemString(arg_dict, "argc", argc);

if (!PyCallable_Check(simlog_func)) {
PyErr_Print();
fprintf(stderr, "_printRecord is not callable");
goto cleanup;
}

// Now that logging has been set up ok we initialise the testbench
// Save a handle to the lock object
lock = PyObject_GetAttrString(cocotb_module, "_rlock");

Expand Down Expand Up @@ -196,6 +216,8 @@ void embed_sim_init(void)
cleanup:
if (cocotb_module)
Py_DECREF(cocotb_module);
if (arg_dict)
Py_DECREF(arg_dict);
PyGILState_Release(gstate);
}

Expand Down
12 changes: 11 additions & 1 deletion lib/vpi_shim/gpi_vpi.c
Original file line number Diff line number Diff line change
Expand Up @@ -895,7 +895,17 @@ void register_embed(void)
int handle_sim_init(void *gpi_cb_data)
{
FENTER
embed_sim_init();
s_vpi_vlog_info info;
gpi_sim_info_t sim_info;

vpi_get_vlog_info(&info);

sim_info.argc = info.argc;
sim_info.argv = info.argv;
sim_info.product = info.product;
sim_info.version = info.version;

embed_sim_init(&sim_info);
FEXIT
}

Expand Down
11 changes: 6 additions & 5 deletions makefiles/simulators/Makefile.icarus
Original file line number Diff line number Diff line change
Expand Up @@ -37,14 +37,15 @@ $(OBJ_DIR):
.PHONY: sim
sim: $(OBJ_DIR) $(VERILOG_SOURCES)
iverilog -o $(OBJ_DIR)/sim.vvp $(VERILOG_SOURCES)
PYTHONPATH=$(LIB_DIR):$(SIM_ROOT):$(PWD):$(PYTHONPATH) LD_LIBRARY_PATH=$(LIB_DIR) MODULE=$(MODULE) TESTCASE=$(TESTCASE) TOPLEVEL=$(TOPLEVEL) \
vvp -M $(LIB_DIR) -m gpivpi $(OBJ_DIR)/sim.vvp
PYTHONPATH=$(LIB_DIR):$(SIM_ROOT):$(PWD):$(PYTHONPATH) LD_LIBRARY_PATH=$(LIB_DIR) MODULE=$(MODULE) \
TESTCASE=$(TESTCASE) TOPLEVEL=$(TOPLEVEL) \
vvp -M $(LIB_DIR) -m gpivpi $(OBJ_DIR)/sim.vvp $(PLUSARGS)
.PHONY: gdb
gdb: $(OBJ_DIR) $(VERILOG_SOURCES)
iverilog -o $(OBJ_DIR)/sim.vvp $(VERILOG_SOURCES)
PYTHONPATH=$(LIB_DIR):$(SIM_ROOT):$(PWD):$(PYTHONPATH) LD_LIBRARY_PATH=$(LIB_DIR) MODULE=$(MODULE) TESTCASE=$(TESTCASE) TOPLEVEL=$(TOPLEVEL) \
gdb --args vvp -M $(LIB_DIR) -m gpivpi $(OBJ_DIR)/sim.vvp

PYTHONPATH=$(LIB_DIR):$(SIM_ROOT):$(PWD):$(PYTHONPATH) LD_LIBRARY_PATH=$(LIB_DIR) MODULE=$(MODULE) \
TESTCASE=$(TESTCASE) TOPLEVEL=$(TOPLEVEL) \
gdb --args vvp -M $(LIB_DIR) -m gpivpi $(OBJ_DIR)/sim.vvp $(PLUSARGS)

clean:
rm -rf $(OBJ_DIR)

0 comments on commit d7bda44

Please sign in to comment.