Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Remove Bit class #3549

Merged
merged 1 commit into from Dec 8, 2023
Merged

Remove Bit class #3549

merged 1 commit into from Dec 8, 2023

Conversation

ktbarrett
Copy link
Member

@ktbarrett ktbarrett commented Dec 2, 2023

Previously Bit was supposed to be a part of a grander plan to incorporate more HDL types, but that plan was abandoned and Bit is now useless.

Additionally, Logic was expanded to cover the whole 9-value VHDL std_logic type because SV's 4-value type is a strict subset and why not have more features than less?

Closes #2666.

Copy link

codecov bot commented Dec 2, 2023

Codecov Report

All modified and coverable lines are covered by tests ✅

Comparison is base (b5012f9) 47.56% compared to head (69eec69) 66.63%.
Report is 4 commits behind head on master.

Additional details and impacted files
@@             Coverage Diff             @@
##           master    #3549       +/-   ##
===========================================
+ Coverage   47.56%   66.63%   +19.07%     
===========================================
  Files          48       48               
  Lines        8383     8480       +97     
  Branches     2387     2414       +27     
===========================================
+ Hits         3987     5651     +1664     
+ Misses       3794     1696     -2098     
- Partials      602     1133      +531     

☔ View full report in Codecov by Sentry.
📢 Have feedback on the report? Share it here.

@ktbarrett ktbarrett force-pushed the remove-bit branch 2 times, most recently from 5b825f4 to 77cbe83 Compare December 2, 2023 14:55
@ktbarrett ktbarrett marked this pull request as ready for review December 2, 2023 21:32
@ktbarrett ktbarrett requested a review from a team December 2, 2023 21:32
Previously Bit was supposed to be a part of a grander plan to
incorporate more HDL types, but that plan was abandoned and Bit is now
useless.

Additionally, Logic was expanded to cover the whole 9-value VHDL
std_logic type because SV's 4-value type is a strict subset and why not
have more features than less?
@marlonjames
Copy link
Contributor

I will look at this tonight.

@ktbarrett ktbarrett merged commit 6c3aa51 into cocotb:master Dec 8, 2023
23 checks passed
@ktbarrett ktbarrett deleted the remove-bit branch December 8, 2023 13:03
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Remove Bit?
3 participants