Cleaned up support for W5200 and W5500

codebndr · May 24, 2016 · 180be74 · 180be74
1 parent 65cf743
commit 180be74
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Showing 9 changed files with 147 additions and 295 deletions.
diff --git a/hardware/ariadne/bootloaders/ariadne/w5100.c → hardware/ariadne/bootloaders/ariadne/net.c b/hardware/ariadne/bootloaders/ariadne/w5100.c → hardware/ariadne/bootloaders/ariadne/net.c
@@ -11,36 +11,48 @@
 #include <avr/eeprom.h>
 
 #include "spi.h"
-#include "w5100.h"
+#include "net.h"
 #include "neteeprom.h"
 #include "serial.h"
 #include "debug.h"
 #include "debug_net.h"
 
-#if (W5200 > 0)
-#include "w5200.c"
-#elif (W5500 > 0)
-#include "w5500.c"
-#else
-
 
 uint8_t registerBuffer[REGISTER_BLOCK_SIZE] = {
-	0x80,         // MR Mode - reset device
+	0x80,       // MR Mode - reset device
 
 	// EEPROM block starts here
-	GW_ADDR,      // GWR Gateway IP Address Register
-	SUB_MASK,  // SUBR Subnet Mask Register
-	MAC_ADDR,     // SHAR Source Hardware Address Register
-	IP_ADDR,      // SIPR Source IP Address Register
+	GW_ADDR,    // GWR Gateway IP Address Register
+	SUB_MASK,   // SUBR Subnet Mask Register
+	MAC_ADDR,   // SHAR Source Hardware Address Register
+	IP_ADDR,    // SIPR Source IP Address Register
 	// EEPROM block ends here
 
+#if defined(__WIZ_W5100__)
 	0, 0,         // Reserved locations
 	0,            // IR Interrupt Register
 	0,            // IMR Interrupt Mask Register
 	0x07, 0xd0,   // RTR Retry Time-value Register
 	0x80,         // RCR Retry Count Register
 	0x55,         // RMSR Rx Memory Size Register, 2K per socket
 	0x55          // TMSR Tx Memory Size Register, 2K per socket
+#elif defined(__WIZ_W5200__)
+	0, 0,         // Reserved locations
+	0,            // IR Interrupt Register
+	0,            // IMR Interrupt Mask Register
+	0x07, 0xd0,   // RTR Retry Time-value Register
+	0x08,         // RCR Retry Count Register
+	0,            // Reserved in w5200
+	0             // Reserved in w5200
+#elif defined(__WIZ_W5500__)
+	0, 0,         // Interrupt Low Level Timer (INTLEVEL0), (INTLEVEL1) (0x0013, 0x0014)
+	0,            // IR Interrupt Register (0x0015)
+	0,            // IMR Interrupt Mask Register (0x0016)
+	0,            // Socket Interrupt (SIR) (0x0017)
+	0,            // Socket Interrupt Mask (SIMR) (0x0018)
+	0x07, 0xd0,   // RTR Retry Time-value Register ((RTR0),(RTR0)) (0x0019,0x001A)
+	0x08,         // RCR Retry Count Register (0x001B)
+#endif
 };
 
 
@@ -59,7 +71,7 @@ void netInit(void)
 		DBG_NET(tracePGMlnNet(mDebugNet_EEPROM);)
 
 	}
-	DBG_NET(
+    DBG_NET(
 		else tracePGMlnNet(mDebugNet_BUILTIN);
 	)
 
@@ -88,13 +100,31 @@ void netInit(void)
 	)
 
 	/** Configure Wiznet chip. Network settings */
+#if defined(__WIZ_W5200__)
+	for(i = 0; i < REGISTER_BLOCK_SIZE-2; i++)
+#else
 	for(i = 0; i < REGISTER_BLOCK_SIZE; i++)
+#endif
+#if defined(__WIZ_W5500__)
+		spiWriteReg(i, 0x04, registerBuffer[i]);
+#else
 		spiWriteReg(i, 0, registerBuffer[i]);
+#endif
 
-	DBG_NET(tracePGMlnNet(mDebugNet_DONE);)
-}
-
+#if defined(__WIZ_W5200__)
+        for (i=0; i<8; i++) {
+            spiWriteReg((0x4000 + i * 0x100 + 0x001F), 0, 0x02);
+            spiWriteReg((0x4000 + i * 0x100 + 0x001E), 0, 0x02);
+        }
+#elif defined(__WIZ_W5500__)
+	for (int i=0; i<8; i++) {
+        uint8_t cntl_byte = (0x0C + (i<<5));
+       	spiWriteReg(0x1E, cntl_byte, 2);//0x1E - Sn_RXBUF_SIZE
+       	spiWriteReg(0x1F, cntl_byte, 2);//0x1F - Sn_TXBUF_SIZE
+    }
 #endif
 
-// kate: indent-mode cstyle; indent-width 4; replace-tabs off; tab-width 4;
+	DBG_NET(tracePGMlnNet(mDebugNet_DONE);)
+}
 
+// kate: indent-mode cstyle; indent-width 4; replace-tabs on; tab-width 4;
diff --git a/hardware/ariadne/bootloaders/ariadne/net.h b/hardware/ariadne/bootloaders/ariadne/net.h
@@ -0,0 +1,22 @@
+#ifndef net_h
+#define net_h
+
+#if defined(__WIZ_W5100__)
+	#include "w5100.h"
+#elif defined(__WIZ_W5200__)
+	#include "w5200.h"
+#elif defined(__WIZ_W5500__)
+	#include "w5500.h"
+#else
+	#error "Unknown PHY. Cannot find the proper network driver."
+#endif
+
+/* Network settings */
+#define IP_ADDR     192,168,1,128
+#define SUB_MASK    255,255,255,0
+#define GW_ADDR     192,168,1,254
+#define MAC_ADDR    0xDE,0xAD,0xBE,0xEF,0xFE,0xED
+
+void netInit(void);
+
+#endif
diff --git a/hardware/ariadne/bootloaders/ariadne/spi.c b/hardware/ariadne/bootloaders/ariadne/spi.c
@@ -26,51 +26,35 @@ void spiWriteReg(uint16_t address, uint8_t cb, uint8_t value)
 	SPCR = _BV(SPE) | _BV(MSTR); // Set SPI as master
 	SS_LOW();
 
-#if (W5200 > 0)
+#if defined(__WIZ_W5100__)
+	SPDR = SPI_WRITE;
+	while(!(SPSR & _BV(SPIF)));
+#endif
 
 	SPDR = address >> 8;
 	while(!(SPSR & _BV(SPIF)));
 
 	SPDR = address & 0xff;
 	while(!(SPSR & _BV(SPIF)));
 
+#if defined(__WIZ_W5200__)
 	SPDR = 0x80;
 	while(!(SPSR & _BV(SPIF)));
 
 	SPDR = 0x01;
 	while(!(SPSR & _BV(SPIF)));
-
-#elif (W5500 > 0)
-
-	SPDR = address >> 8;
-	while(!(SPSR & _BV(SPIF)));
-
-	SPDR = address & 0xff;
-	while(!(SPSR & _BV(SPIF)));
-
+#endif
+#if defined(_WIZ_W5500__)
 	SPDR = cb;  //Socket 3 BSB Write 0x6D Selects Socket 3 Register, write mode, 1 byte data length
 	while(!(SPSR & _BV(SPIF)));
-
-#else //Standard W5100 Code
-
-	SPDR = SPI_WRITE;
-	while(!(SPSR & _BV(SPIF)));
-
-	SPDR = address >> 8;
-	while(!(SPSR & _BV(SPIF)));
-
-	SPDR = address & 0xff;
-	while(!(SPSR & _BV(SPIF)));
-
 #endif
 
 	SPDR = value;
 	while(!(SPSR & _BV(SPIF)));
 
 	SS_HIGH();
 	cb = 0; //prevents compiler whining about unused cb variable
-	SPCR = cb; // Turn off SPI	
-
+	SPCR = cb; // Turn off SPI
 }
 
 void spiWriteWord(uint16_t address, uint8_t cb, uint16_t value)
@@ -95,43 +79,27 @@ uint8_t spiReadReg(uint16_t address, uint8_t cb)
 	SPCR = _BV(SPE) | _BV(MSTR);
 	SS_LOW();
 
-#if (W5200 > 0)
+#if defined(__WIZ_W5100__)
+	SPDR = SPI_READ;
+	while(!(SPSR & _BV(SPIF)));
+#endif
 
 	SPDR = address >> 8;
 	while(!(SPSR & _BV(SPIF)));
 
 	SPDR = address & 0xff;
 	while(!(SPSR & _BV(SPIF)));
 
+#if defined(__WIZ_W5200__)
 	SPDR = 0x00;
 	while(!(SPSR & _BV(SPIF)));
 
 	SPDR = 0x01;
 	while(!(SPSR & _BV(SPIF)));
-
-#elif (W5500 > 0)
-//W5500 code
-
-	SPDR = address >> 8;
-	while(!(SPSR & _BV(SPIF)));
-
-	SPDR = address & 0xff;
-	while(!(SPSR & _BV(SPIF)));
-
+#endif
+#if defined(_WIZ_W5500__)
 	SPDR = cb;  //Socket 3 BSB Read 0x69 Selects Socket 3 Register, read mode, 1 byte data length
 	while(!(SPSR & _BV(SPIF)));
-
-#else //Standard W5100 Code
-
-	SPDR = SPI_READ;
-	while(!(SPSR & _BV(SPIF)));
-
-	SPDR = address >> 8;
-	while(!(SPSR & _BV(SPIF)));
-
-	SPDR = address & 0xff;
-	while(!(SPSR & _BV(SPIF)));
-
 #endif
 
 	SPDR = 0;

diff --git a/hardware/ariadne/bootloaders/ariadne/tftp.c b/hardware/ariadne/bootloaders/ariadne/tftp.c
@@ -6,34 +6,14 @@
  * Function: tftp implementation and flasher
  * Version: 0.2 tftp / flashing functional
  */
-
-/*W5500 SPI OP Codes*/
-
-//Socket Read BSB:
-#define S2_R_CB 0x48
-#define S3_R_CB 0x68
-
-//Socket Write BSB:
-#define S2_W_CB 0x4C
-#define S3_W_CB 0x6C
-
-//Socket RXbuf BSB:
-#define S2_RXBUF_CB 0x58
-#define S3_RXBUF_CB 0x78
-
-//Socket TXbuf BSB:
-#define S2_TXBUF_CB 0x54
-#define S3_TXBUF_CB 0x74
-
-/*end W5500 SPI OP Codes*/
 
 #include <avr/pgmspace.h>
 #include <util/delay.h>
 #include <avr/boot.h>
 
 #include "util.h"
 #include "spi.h"
-#include "w5100.h"
+#include "net.h"
 #include "neteeprom.h"
 #include "tftp.h"
 #include "validate.h"
@@ -69,9 +49,9 @@ static void sockInit(uint16_t port)
 
 	spiWriteReg(REG_S3_CR, S3_W_CB, CR_CLOSE);
     while(spiReadReg(REG_S3_CR, S3_R_CB)) {
-		//wait for command to complete	
-	}  
-        
+		//wait for command to complete
+	}
+
 	do {
         // Write interrupt
 		spiWriteReg(REG_S3_IR, S3_W_CB, 0xFF);
@@ -82,8 +62,8 @@ static void sockInit(uint16_t port)
 		// Open Socket
 		spiWriteReg(REG_S3_CR, S3_W_CB, CR_OPEN);
 		while(spiReadReg(REG_S3_CR, S3_R_CB)) {
-			//wait for command to complete	
- 		} 
+			//wait for command to complete
+ 		}
 		// Read Status
 		if(spiReadReg(REG_S3_SR, S3_R_CB) != SOCK_UDP)
 			// Close Socket if it wasn't initialized correctly
@@ -398,7 +378,7 @@ static void sendResponse(uint16_t response)
 	uint8_t* txPtr = txBuffer;
 	uint8_t packetLength;
 	uint16_t writePointer;
-	
+
 #if (W5500 > 0)
 	writePointer = spiReadWord(REG_S3_TX_WR0, S3_R_CB);
 #else

diff --git a/hardware/ariadne/bootloaders/ariadne/w5100.h b/hardware/ariadne/bootloaders/ariadne/w5100.h
@@ -1,20 +1,6 @@
 #ifndef w5100_h
 #define w5100_h
 
-
-/* Network settings */
-#define IP_ADDR     192,168,1,128
-#define SUB_MASK    255,255,255,0
-#define GW_ADDR     192,168,1,254
-#define MAC_ADDR    0xDE,0xAD,0xBE,0xEF,0xFE,0xED
-
-
-#if (W5200 > 0)
-#include "w5200.h"
-#elif (W5500 > 0)
-#include "w5500.h"
-#else
-
 //Mode
 #define REG_MR          0x000
 //GW Address
@@ -293,11 +279,23 @@
 #define IR_RECV      0x04
 #define IR_DISCON    0x02
 #define IR_CON       0x01
-#define IR_CLR       0x00
+//#define IR_CLR       0x00
 
-
-void netInit(void);
+/**
+  * W5500 SPI OP Codes
+  * These are not used for W5100 or W5200. They are here to satisfy the compiler*/
+//Socket Read BSB:
+#define S2_R_CB 0x48
+#define S3_R_CB 0x68
+//Socket Write BSB:
+#define S2_W_CB 0x4C
+#define S3_W_CB 0x6C
+//Socket RXbuf BSB:
+#define S2_RXBUF_CB 0x58
+#define S3_RXBUF_CB 0x78
+//Socket TXbuf BSB:
+#define S2_TXBUF_CB 0x54
+#define S3_TXBUF_CB 0x74
+/*end W5500 SPI OP Codes*/
 
 #endif
-
-#endif