64bit opt prototype-opt building.

rvm/src-generated/opt-burs/ia32/IA32-IntLoad-32.rules

@@ -0,0 +1,44 @@
+#####
+# INT_LOAD
+# A few more cases than for other load operators to handle pointer arithmetic introduced by use of magic
+#####
+r:	INT_LOAD(riv, riv)
+15
+EMIT_INSTRUCTION
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), MO_L(P(p), DW)));
+
+r:	INT_LOAD(riv, address1scaledreg)
+15
+EMIT_INSTRUCTION
+augmentAddress(Load.getAddress(P(p))); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+		     consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address1scaledreg, riv)
+15
+EMIT_INSTRUCTION
+augmentAddress(Load.getOffset(P(p))); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address1scaledreg, address1reg)
+15
+EMIT_INSTRUCTION
+combineAddresses(); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address1reg, address1scaledreg)
+15
+EMIT_INSTRUCTION
+combineAddresses(); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address, INT_CONSTANT)
+15
+EMIT_INSTRUCTION
+augmentAddress(Load.getOffset(P(p))); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+

rvm/src-generated/opt-burs/ia32/IA32-IntLoad-64.rules

@@ -0,0 +1,44 @@
+#####
+# INT_LOAD
+# A few more cases than for other load operators to handle pointer arithmetic introduced by use of magic
+#####
+r:	INT_LOAD(rlv, riv)
+15
+EMIT_INSTRUCTION
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), MO_L(P(p), DW)));
+
+r:	INT_LOAD(rlv, address1scaledreg)
+15
+EMIT_INSTRUCTION
+augmentAddress(Load.getAddress(P(p))); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+		     consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address1scaledreg, riv)
+15
+EMIT_INSTRUCTION
+augmentAddress(Load.getOffset(P(p))); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address1scaledreg, address1reg)
+15
+EMIT_INSTRUCTION
+combineAddresses(); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address1reg, address1scaledreg)
+15
+EMIT_INSTRUCTION
+combineAddresses(); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+
+r:	INT_LOAD(address, INT_CONSTANT)
+15
+EMIT_INSTRUCTION
+augmentAddress(Load.getOffset(P(p))); \\
+EMIT(MIR_Move.mutate(P(p), IA32_MOV, Load.getResult(P(p)), \\
+	             consumeAddress(DW, Load.getLocation(P(p)), Load.getGuard(P(p)))));
+

rvm/src-generated/opt-burs/ia32/IA32-LongAdd-64.rules

@@ -13,8 +13,9 @@ r:	LONG_ADD(r, rlv)
 11
 EMIT_INSTRUCTION
 if (Binary.getVal2(P(p)).isLongConstant()) { \\
- OptimizingCompilerException.TODO(); \\
- // pushAddress(R(Binary.getVal1(P(p))), null, B_S, Offset.fromLong(VR(p))); \\
+  pushAddress(R(Binary.getVal1(P(p))), null, B_S, Offset.fromLong(VR(p))); \\
+} else if (Binary.getVal2(P(p)).isIntConstant()) { \\
+  pushAddress(R(Binary.getVal1(P(p))), null, B_S, Offset.fromIntSignExtend(VR(p))); \\
 } else { \\
  pushAddress(R(Binary.getVal1(P(p))), R(Binary.getVal2(P(p))), B_S, Offset.zero()); \\
 } \\

rvm/src-generated/opt-burs/ia32/IA32.rules

@@ -87,7 +87,7 @@ NOFLAGS
 // No code emitted
 
 # the non-terminal rlv is either an r or an lv
-rlv:	r
+rlv:	riv
 0
 NOFLAGS
 // No code emitted