Fix x87 rules since BURS changes.

rvm/src-generated/opt-burs/ia32/IA32_x87.rules

@@ -13,7 +13,7 @@
 # BURS rules for IA32 x87 FPU
 #
 # The format of PRODUCTION is 'non-terminal:	rule'
-PRODUCTION
+# PRODUCTION
 # COST is a Java expression that evaluates to an integer.
 # The following conventions are more or less followed:
 #   Each instruction generated has a base cost of 10
@@ -56,91 +56,91 @@ pushMO(MO_MC(P(p)));
 # FP_ADD (handles both float and double; both are 80 bit anyways...)
 #####
 r:	FP_ADD(r, r)
-p.child1.isREGISTERNode()?56:39
+p.getChild1().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FADD, Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
 
 r:	FP_ADD(r, r)
-p.child2.isREGISTERNode()?56:39
+p.getChild2().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FADD, Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
 
 r:	FP_ADD(r, fpload)
-p.child1.isREGISTERNode()?58:41
+p.getChild1().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FADD, Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO());
 
 r:	FP_ADD(fpload, r)
-p.child2.isREGISTERNode()?58:41
+p.getChild2().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FADD, Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO());
 
 #####
 # FP_MUL (handles both float and double; both are 80 bit anyways...)
 #####
 r:	FP_MUL(r, r)
-p.child1.isREGISTERNode()?56:39
+p.getChild1().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FMUL, Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
 
 r:	FP_MUL(r, r)
-p.child2.isREGISTERNode()?56:39
+p.getChild2().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FMUL, Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
 
 r:	FP_MUL(r, fpload)
-p.child1.isREGISTERNode()?58:41
+p.getChild1().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FMUL, Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO());
 
 r:	FP_MUL(fpload, r)
-p.child2.isREGISTERNode()?58:41
+p.getChild2().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FMUL, Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO());
 
 #####
 # FP_SUB (handles both float and double; both are 80 bit anyways...)
 #####
 r:	FP_SUB(r, r)
-p.child1.isREGISTERNode()?56:39
+p.getChild1().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FSUB, Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
 
 r:	FP_SUB(r, r)
-p.child2.isREGISTERNode()?56:39
+p.getChild2().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FSUBR, Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
 
 r:	FP_SUB(r, fpload)
-p.child1.isREGISTERNode()?58:41
+p.getChild1().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FSUB, Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO());
 
 r:	FP_SUB(fpload, r)
-p.child2.isREGISTERNode()?58:41
+p.getChild2().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FSUBR, Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO());
 
 #####
 # FP_DIV (handles both float and double; both are 80 bit anyways...)
 #####
 r:	FP_DIV(r, r)
-p.child1.isREGISTERNode()?56:39
+p.getChild1().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FDIV, Binary.getResult(P(p)), Binary.getVal1(P(p)), Binary.getVal2(P(p)));
 
 r:	FP_DIV(r, r)
-p.child2.isREGISTERNode()?56:39
+p.getChild2().isREGISTERNode()?56:39
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FDIVR, Binary.getResult(P(p)), Binary.getVal2(P(p)), Binary.getVal1(P(p)));
 
 r:	FP_DIV(r, fpload)
-p.child1.isREGISTERNode()?58:41
+p.getChild1().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FDIV, Binary.getResult(P(p)), Binary.getVal1(P(p)), consumeMO());
 
 r:	FP_DIV(fpload, r)
-p.child2.isREGISTERNode()?58:41
+p.getChild2().isREGISTERNode()?58:41
 EMIT_INSTRUCTION
 FP_MOV_OP_MOV(P(p), IA32_FDIVR, Binary.getResult(P(p)), Binary.getVal2(P(p)), consumeMO());
 
@@ -168,7 +168,7 @@ EMIT(MIR_Move.mutate(P(p), IA32_FMOV, Unary.getResult(P(p)), D(getFPR(0))));
 # FLOAT_MOVE
 ######
 r:	FLOAT_MOVE(r)
-p.child1.isREGISTERNode()?30:13
+p.getChild1().isREGISTERNode()?30:13
 EMIT_INSTRUCTION
 EMIT(MIR_Move.mutate(P(p), IA32_FMOV, Move.getResult(P(p)), Move.getVal(P(p))));
 
@@ -181,7 +181,7 @@ NOFLAGS
 # DOUBLE_MOVE
 ######
 r:	DOUBLE_MOVE(r)
-p.child1.isREGISTERNode()?30:13
+p.getChild1().isREGISTERNode()?30:13
 EMIT_INSTRUCTION
 EMIT(MIR_Move.mutate(P(p), IA32_FMOV, Move.getResult(P(p)), Move.getVal(P(p))));
 
@@ -258,14 +258,14 @@ EMIT(MIR_Move.mutate(P(p), IA32_FMOV, MO_AS(P(p), QW_S, QW), AStore.getValue(P(p
 # FLOAT_IFCMP
 #####
 stm:   FLOAT_IFCMP(r,r)
-p.child1.isREGISTERNode()?60:43
+p.getChild1().isREGISTERNode()?60:43
 EMIT_INSTRUCTION
 EMIT(MIR_Move.create(IA32_FMOV, F(getFPR(0)), IfCmp.getClearVal1(P(p)))); \
 EMIT(MIR_Compare.create(IA32_FCOMI, F(getFPR(0)), IfCmp.getClearVal2(P(p)))); \
 EMIT(P(p)); // ComplexLIR2MIRExpansion will handle rest of the work.
 
 stm:   FLOAT_IFCMP(r,r)
-p.child2.isREGISTERNode()?60:43
+p.getChild2().isREGISTERNode()?60:43
 EMIT_INSTRUCTION
 EMIT(MIR_Move.create(IA32_FMOV, F(getFPR(0)), IfCmp.getClearVal2(P(p)))); \
 EMIT(MIR_Compare.create(IA32_FCOMI, F(getFPR(0)), IfCmp.getClearVal1(P(p)))); \
@@ -276,14 +276,14 @@ EMIT(P(p)); // ComplexLIR2MIRExpansion will handle rest of the work.
 # DOUBLE_IFCMP
 #####
 stm:   DOUBLE_IFCMP(r,r)
-p.child1.isREGISTERNode()?60:43
+p.getChild1().isREGISTERNode()?60:43
 EMIT_INSTRUCTION
 EMIT(MIR_Move.create(IA32_FMOV, F(getFPR(0)), IfCmp.getClearVal1(P(p)))); \
 EMIT(MIR_Compare.create(IA32_FCOMI, F(getFPR(0)), IfCmp.getClearVal2(P(p)))); \
 EMIT(P(p)); // ComplexLIR2MIRExpansion will handle rest of the work.
 
 stm:   DOUBLE_IFCMP(r,r)
-p.child2.isREGISTERNode()?60:43
+p.getChild2().isREGISTERNode()?60:43
 EMIT_INSTRUCTION
 EMIT(MIR_Move.create(IA32_FMOV, F(getFPR(0)), IfCmp.getClearVal2(P(p)))); \
 EMIT(MIR_Compare.create(IA32_FCOMI, F(getFPR(0)), IfCmp.getClearVal1(P(p)))); \
@@ -477,7 +477,7 @@ CMOV_FMOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)), \
 # FCMP_CMOV
 #####
 r: FCMP_CMOV(r, OTHER_OPERAND(r, any))
-p.child1.isREGISTERNode()?60:43
+p.getChild1().isREGISTERNode()?60:43
 EMIT_INSTRUCTION
 EMIT(CPOS(P(p), MIR_Move.create(IA32_FMOV, D(getFPR(0)), CondMove.getVal1(P(p))))); \
 EMIT(CPOS(P(p), MIR_Compare.create(IA32_FCOMI, D(getFPR(0)), CondMove.getVal2(P(p))))); \
@@ -488,7 +488,7 @@ CMOV_MOV(P(p), CondMove.getResult(P(p)), CondMove.getCond(P(p)).translateUNSIGNE
 # FCMP_FCMOV
 #####
 r: FCMP_FCMOV(r, OTHER_OPERAND(r, any))
-p.child1.isREGISTERNode()?60:43
+p.getChild1().isREGISTERNode()?60:43
 EMIT_INSTRUCTION
 EMIT(CPOS(P(p), MIR_Move.create(IA32_FMOV, D(getFPR(0)), CondMove.getVal1(P(p))))); \
 EMIT(CPOS(P(p), MIR_Compare.create(IA32_FCOMI, D(getFPR(0)), CondMove.getVal2(P(p))))); \
@@ -564,7 +564,7 @@ EMIT(P(p)); /* leave for complex operators */
 # FLOAT_2DOUBLE
 #####
 r:	FLOAT_2DOUBLE(r)
-p.child1.isREGISTERNode()?30:13
+p.getChild1().isREGISTERNode()?30:13
 EMIT_INSTRUCTION
 EMIT(MIR_Move.mutate(P(p), IA32_FMOV, Unary.getResult(P(p)), Unary.getVal(P(p))));