mb/google/dedede: Create dexi variant

Create the dexi variant of the taranza project by
copying the files to a new directory named for the variant.

BUG=b:303533815
BRANCH=dedede
TEST=util/abuild/abuild -p none -t google/dedede -x -a
make sure the build includes GOOGLE_DEXI

Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Change-Id: I708a16cb864dca7309cb0201e7887af7456a4885
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78249
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/dedede/Kconfig

@@ -228,6 +228,13 @@ config BOARD_GOOGLE_BOXY
 	select RT8168_GET_MAC_FROM_VPD
 	select RT8168_SET_LED_MODE
 
+config BOARD_GOOGLE_DEXI
+	select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
+	select RT8168_GEN_ACPI_POWER_RESOURCE
+	select RT8168_GET_MAC_FROM_VPD
+	select RT8168_SET_LED_MODE
+	select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR
+
 if BOARD_GOOGLE_BASEBOARD_DEDEDE
 
 config BASEBOARD_DEDEDE_LAPTOP
@@ -300,6 +307,7 @@ config MAINBOARD_PART_NUMBER
 	default "Shotzo" if BOARD_GOOGLE_SHOTZO
 	default "Taranza" if BOARD_GOOGLE_TARANZA
 	default "Boxy" if BOARD_GOOGLE_BOXY
+	default "Dexi" if BOARD_GOOGLE_DEXI
 
 config MAX_CPUS
 	int
@@ -342,6 +350,7 @@ config VARIANT_DIR
 	default "shotzo" if BOARD_GOOGLE_SHOTZO
 	default "taranza" if BOARD_GOOGLE_TARANZA
 	default "boxy" if BOARD_GOOGLE_BOXY
+	default "dexi" if BOARD_GOOGLE_DEXI
 
 endif #BOARD_GOOGLE_BASEBOARD_DEDEDE
 

src/mainboard/google/dedede/Kconfig.name

@@ -91,3 +91,6 @@ config BOARD_GOOGLE_TARANZA
 
 config BOARD_GOOGLE_BOXY
 	bool "->  Boxy"
+
+config BOARD_GOOGLE_DEXI
+	bool "->  Dexi"

src/mainboard/google/dedede/variants/dexi/Makefile.inc

@@ -0,0 +1,6 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+ramstage-y += gpio.c
+
+ramstage-y += variant.c
+ramstage-y += ramstage.c

src/mainboard/google/dedede/variants/dexi/gpio.c

@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+
+/* Pad configuration in ramstage */
+static const struct pad_config gpio_table[] = {
+	/* A11 : TOUCH_RPT_EN */
+	PAD_NC(GPP_A11, NONE),
+	/* A12 : USB_OC1_N */
+	PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
+	/* A13 : USB_OC2_N */
+	PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
+	/* A14 : USB_OC3_N */
+	PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
+	/* A18 : USB_OC0_N */
+	PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
+
+	/* B9 : LAN_CLKREQ_ODL */
+	PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
+
+	/* D2  : PWM_PP3300_BUZZER */
+	PAD_CFG_GPO(GPP_D2, 1, DEEP),
+	/* D4  : LAN_PE_ISOLATE_ODL_R */
+	PAD_CFG_GPO(GPP_D4, 1, DEEP),
+	/* D5  : TOUCH_RESET_L */
+	PAD_NC(GPP_D5, NONE),
+	/* D6  : EN_PP3300_TOUCH_S0 */
+	PAD_NC(GPP_D6, NONE),
+	/* D17 : LAN_PERST_L */
+	PAD_CFG_GPO(GPP_D17, 1, PLTRST),
+	/* D19 : WWAN_WLAN_COEX1 */
+	PAD_NC(GPP_D19, NONE),
+	/* D20 : WWAN_WLAN_COEX2 */
+	PAD_NC(GPP_D20, NONE),
+
+	/* E13 : GPP_E13/DDI0_DDC_SCL */
+	PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
+	/* E14 : GPP_E14/DDI0_DDC_SDA */
+	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
+	/* E15 : GPP_E15/DDI1_DDC_SCL */
+	PAD_CFG_NF(GPP_E15, NONE, DEEP, NF1),
+	/* E16 : GPP_E16/DDI1_DDC_SDA */
+	PAD_CFG_NF(GPP_E16, NONE, DEEP, NF1),
+
+	/* G0  : SD_CMD */
+	PAD_NC(GPP_G0, NONE),
+	/* G1  : SD_DATA0 */
+	PAD_NC(GPP_G1, NONE),
+	/* G2  : SD_DATA1 */
+	PAD_NC(GPP_G2, NONE),
+	/* G3  : SD_DATA2 */
+	PAD_NC(GPP_G3, NONE),
+	/* G4  : SD_DATA3 */
+	PAD_NC(GPP_G4, NONE),
+	/* G5  : SD_CD_ODL */
+	PAD_NC(GPP_G5, NONE),
+	/* G6  : SD_CLK */
+	PAD_NC(GPP_G6, NONE),
+	/* G7  : SD_SDIO_WP */
+	PAD_NC(GPP_G7, NONE),
+
+	/* H4  : AP_I2C_TS_SDA */
+	PAD_NC(GPP_H4, NONE),
+	/* H5  : AP_I2C_TS_SCL */
+	PAD_NC(GPP_H5, NONE),
+	/* H6  : AP_I2C_CAM_SDA */
+	PAD_NC(GPP_H6, NONE),
+	/* H7  : AP_I2C_CAM_SCL */
+	PAD_NC(GPP_H7, NONE),
+	/* H15 : I2S_SPK_BCLK */
+	PAD_NC(GPP_H15, NONE),
+
+	/* R6  : I2S_SPK_LRCK */
+	PAD_NC(GPP_R6, NONE),
+	/* R7  :  I2S_SPK_AUDIO */
+	PAD_NC(GPP_R7, NONE),
+
+	/* S2  : DMIC1_CLK */
+	PAD_NC(GPP_S2, NONE),
+	/* S3  : DMIC1_DATA */
+	PAD_NC(GPP_S3, NONE),
+	/* S6  :  DMIC0_CLK */
+	PAD_NC(GPP_S6, NONE),
+	/* S7  : DMIC0_DATA */
+	PAD_NC(GPP_S7, NONE),
+};
+
+const struct pad_config *variant_override_gpio_table(size_t *num)
+{
+	*num = ARRAY_SIZE(gpio_table);
+	return gpio_table;
+}

src/mainboard/google/dedede/variants/dexi/include/variant/ec.h

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef MAINBOARD_EC_H
+#define MAINBOARD_EC_H
+
+#include <baseboard/dibbi/ec.h>
+
+#endif

src/mainboard/google/dedede/variants/dexi/include/variant/gpio.h

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif /* MAINBOARD_GPIO_H */

src/mainboard/google/dedede/variants/dexi/memory/Makefile.inc

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This is an auto-generated file. Do not edit!!
+# Generated by:
+# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/dexi/memory/ src/mainboard/google/dedede/variants/dexi/memory/mem_parts_used.txt
+
+SPD_SOURCES =
+SPD_SOURCES += spd/lp4x/set-1/spd-1.hex      # ID = 0(0b0000)  Parts = MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL, H54G46CYRBX267
+SPD_SOURCES += spd/lp4x/set-1/spd-3.hex      # ID = 1(0b0001)  Parts = K4UBE3D4AB-MGCL, H54G56CYRBX247

src/mainboard/google/dedede/variants/dexi/memory/dram_id.generated.txt

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This is an auto-generated file. Do not edit!!
+# Generated by:
+# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/dexi/memory/ src/mainboard/google/dedede/variants/dexi/memory/mem_parts_used.txt
+
+DRAM Part Name                 ID to assign
+MT53E512M32D1NP-046 WT:B       0 (0000)
+K4U6E3S4AB-MGCL                0 (0000)
+K4UBE3D4AB-MGCL                1 (0001)
+H54G46CYRBX267                 0 (0000)
+H54G56CYRBX247                 1 (0001)

src/mainboard/google/dedede/variants/dexi/memory/mem_parts_used.txt

@@ -0,0 +1,16 @@
+# This is a CSV file containing a list of memory parts used by this variant.
+# One part per line with an optional fixed ID in column 2.
+# Only include a fixed ID if it is required for legacy reasons!
+# Generated IDs are dependent on the order of parts in this file,
+# so new parts must always be added at the end of the file!
+#
+# Generate an updated Makefile.inc and dram_id.generated.txt by running the
+# part_id_gen tool from util/spd_tools.
+# See util/spd_tools/README.md for more details and instructions.
+
+# Part Name
+MT53E512M32D1NP-046 WT:B
+K4U6E3S4AB-MGCL
+K4UBE3D4AB-MGCL
+H54G46CYRBX267
+H54G56CYRBX247