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soc/intel/cmd/blk/cse: Implement APIs to access CMOS CSE FPT versions
This patch implements APIs to access the CSE FW partition versions in CMOS. The get API allows users to retrieve the current version from CMOS memory. The set API allows users to set the version in CMOS memory. BUG=b:280722061 TEST=APIs verified on rex board. Signed-off-by: Dinesh Gehlot <digehlot@google.com> Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74995 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#include <console/console.h> | ||
#include <ip_checksum.h> | ||
#include <pc80/mc146818rtc.h> | ||
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#include "cse_lite_cmos.h" | ||
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/* | ||
* We need a region in CMOS to store the firmware versions. | ||
* | ||
* This can either be declared as part of the option | ||
* table or statically defined in the board config. | ||
*/ | ||
#if CONFIG(USE_OPTION_TABLE) | ||
# include "option_table.h" | ||
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#ifndef CMOS_VSTART_partition_fw | ||
#error "The `ramtop` CMOS entry is missing, please add it to your cmos.layout." | ||
#endif | ||
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#if CMOS_VSTART_partition_fw % 8 != 0 | ||
#error "The `partition firmware` CMOS entry needs to be byte aligned, check your cmos.layout." | ||
#endif // CMOS_VSTART_partition_fw % 8 != 0 | ||
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#if CMOS_VLEN_partition_fw != (32 * 8) | ||
#error "The partition firmware entry needs to be 32 bytes long, check your cmos.layout." | ||
#endif | ||
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# define PARTITION_FW_CMOS_OFFSET (CMOS_VSTART_partition_fw >> 3) | ||
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#else | ||
# if (CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET != 0) | ||
# define PARTITION_FW_CMOS_OFFSET CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET | ||
# else | ||
# error "Must configure CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET" | ||
# endif | ||
#endif | ||
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/* Helper function to read CSE fpt information from cmos memory. */ | ||
void cmos_read_fw_partition_info(struct cse_specific_info *info) | ||
{ | ||
for (uint8_t *p = (uint8_t *)info, i = 0; i < sizeof(*info); i++, p++) | ||
*p = cmos_read(PARTITION_FW_CMOS_OFFSET + i); | ||
} | ||
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/* Helper function to write CSE fpt information to cmos memory. */ | ||
void cmos_write_fw_partition_info(const struct cse_specific_info *info) | ||
{ | ||
for (uint8_t *p = (uint8_t *)info, i = 0; i < sizeof(*info); i++, p++) | ||
cmos_write(*p, PARTITION_FW_CMOS_OFFSET + i); | ||
} |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#ifndef SOC_INTEL_COMMON_BLOCK_CSE_LITE_CMOS_H | ||
#define SOC_INTEL_COMMON_BLOCK_CSE_LITE_CMOS_H | ||
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#include <intelblocks/cse.h> | ||
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/* Helper function to read CSE fpt information from cmos memory. */ | ||
void cmos_read_fw_partition_info(struct cse_specific_info *info); | ||
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/* Helper function to write CSE fpt information to cmos memory. */ | ||
void cmos_write_fw_partition_info(const struct cse_specific_info *info); | ||
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#endif /* SOC_INTEL_COMMON_BLOCK_CSE_LITE_CMOS_H */ |