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sb/intel/bd82x6x/pch.c: Extract common functions
PCH identification functions and `pch_iobp_update` are used in multiple stages. Move them out of `pch.c` to drop some ugly preprocessor usage. Subsequent commits will use `pch_iobp_update` in romstage as well. Change-Id: I8d33338a4f74fd03c8f99f8fcece99b63c28adab Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79624 Reviewed-by: Naresh <naresh.solanki.2011@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Original file line number | Diff line number | Diff line change |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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#define __SIMPLE_DEVICE__ | ||
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#include <console/console.h> | ||
#include <delay.h> | ||
#include <device/pci.h> | ||
#include <device/pci_def.h> | ||
#include <device/pci_ids.h> | ||
#include <device/pci_ops.h> | ||
#include <stdint.h> | ||
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#include "pch.h" | ||
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int pch_silicon_revision(void) | ||
{ | ||
static int pch_revision_id = -1; | ||
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if (pch_revision_id < 0) | ||
pch_revision_id = pci_read_config8(PCH_LPC_DEV, PCI_REVISION_ID); | ||
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return pch_revision_id; | ||
} | ||
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int pch_silicon_type(void) | ||
{ | ||
static int pch_type = -1; | ||
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if (pch_type < 0) | ||
pch_type = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1); | ||
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return pch_type; | ||
} | ||
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int pch_silicon_supported(int type, int rev) | ||
{ | ||
int cur_type = pch_silicon_type(); | ||
int cur_rev = pch_silicon_revision(); | ||
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switch (type) { | ||
case PCH_TYPE_CPT: | ||
/* CougarPoint minimum revision */ | ||
if (cur_type == PCH_TYPE_CPT && cur_rev >= rev) | ||
return 1; | ||
/* PantherPoint any revision */ | ||
if (cur_type == PCH_TYPE_PPT) | ||
return 1; | ||
break; | ||
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case PCH_TYPE_PPT: | ||
/* PantherPoint minimum revision */ | ||
if (cur_type == PCH_TYPE_PPT && cur_rev >= rev) | ||
return 1; | ||
break; | ||
} | ||
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return 0; | ||
} | ||
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#define IOBP_RETRY 1000 | ||
static inline int iobp_poll(void) | ||
{ | ||
unsigned int try = IOBP_RETRY; | ||
u32 data; | ||
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while (try--) { | ||
data = RCBA32(IOBPS); | ||
if ((data & 1) == 0) | ||
return 1; | ||
udelay(10); | ||
} | ||
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printk(BIOS_ERR, "IOBP timeout\n"); | ||
return 0; | ||
} | ||
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void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue) | ||
{ | ||
u32 data; | ||
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/* Set the address */ | ||
RCBA32(IOBPIRI) = address; | ||
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/* READ OPCODE */ | ||
if (pch_silicon_supported(PCH_TYPE_CPT, PCH_STEP_B0)) | ||
RCBA32(IOBPS) = IOBPS_RW_BX; | ||
else | ||
RCBA32(IOBPS) = IOBPS_READ_AX; | ||
if (!iobp_poll()) | ||
return; | ||
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/* Read IOBP data */ | ||
data = RCBA32(IOBPD); | ||
if (!iobp_poll()) | ||
return; | ||
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/* Check for successful transaction */ | ||
if ((RCBA32(IOBPS) & 0x6) != 0) { | ||
printk(BIOS_ERR, "IOBP read 0x%08x failed\n", address); | ||
return; | ||
} | ||
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/* Update the data */ | ||
data &= andvalue; | ||
data |= orvalue; | ||
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/* WRITE OPCODE */ | ||
if (pch_silicon_supported(PCH_TYPE_CPT, PCH_STEP_B0)) | ||
RCBA32(IOBPS) = IOBPS_RW_BX; | ||
else | ||
RCBA32(IOBPS) = IOBPS_WRITE_AX; | ||
if (!iobp_poll()) | ||
return; | ||
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/* Write IOBP data */ | ||
RCBA32(IOBPD) = data; | ||
if (!iobp_poll()) | ||
return; | ||
} |
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