tpm: Refactor TPM Kconfig dimensions

Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
coreboot · Apr 21, 2022 · c6b041a · c6b041a
1 parent 0b71099
commit c6b041a
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diff --git a/Documentation/getting_started/kconfig.md b/Documentation/getting_started/kconfig.md
@@ -786,7 +786,7 @@ select &lt;symbol&gt; \[if &lt;expr&gt;\]
     config TPM
         bool
         default n
-        select LPC_TPM if ARCH_X86
+        select MEMORY_MAPPED_TPM if ARCH_X86
         select I2C_TPM if ARCH_ARM
         select I2C_TPM if ARCH_ARM64
         help

diff --git a/src/drivers/crb/Kconfig b/src/drivers/crb/Kconfig
@@ -1,17 +1,11 @@
 config CRB_TPM
 	bool
+	default n
 	help
-	  CRB TPM driver is enabled!
+	  Mainboard has Command Response Buffer support
 
 config CRB_TPM_BASE_ADDRESS
 	hex
 	default 0xfed40000
 	help
 	  Base Address of the CRB TPM Command Structure
-
-config MAINBOARD_HAS_CRB_TPM
-	bool
-	default n
-	select CRB_TPM
-	help
-	  Mainboard has Command Response Buffer support
diff --git a/src/drivers/crb/Makefile.inc b/src/drivers/crb/Makefile.inc
@@ -1,5 +1,3 @@
-bootblock-$(CONFIG_CRB_TPM) += tis.c tpm.c
-verstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
-romstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
-ramstage-$(CONFIG_CRB_TPM) += tis.c tpm.c
-postcar-$(CONFIG_CRB_TPM) += tis.c tpm.c
+ifeq ($(CONFIG_CRB_TPM),y)
+all-y += tis.c tpm.c
+endif
diff --git a/src/drivers/i2c/tpm/Kconfig b/src/drivers/i2c/tpm/Kconfig
@@ -3,27 +3,6 @@ config I2C_TPM
 	help
 	  I2C TPM driver is enabled!
 
-config MAINBOARD_HAS_I2C_TPM_ATMEL
-	bool
-	default n
-	select I2C_TPM
-	help
-	  Board has an Atmel I2C TPM support
-
-config MAINBOARD_HAS_I2C_TPM_CR50
-	bool
-	default n
-	select I2C_TPM
-	help
-	  Board has a Cr50 I2C TPM support
-
-config MAINBOARD_HAS_I2C_TPM_GENERIC
-	bool
-	default n
-	select I2C_TPM
-	help
-	  Board has a generic I2C TPM support
-
 config MAINBOARD_NEEDS_I2C_TI50_WORKAROUND
 	bool
 	default n
@@ -36,7 +15,7 @@ config MAINBOARD_NEEDS_I2C_TI50_WORKAROUND
 config DRIVER_TIS_DEFAULT
 	bool
 	depends on I2C_TPM
-	default n if MAINBOARD_HAS_I2C_TPM_ATMEL
+	default n if TPM_ATMEL
 	default y
 
 config DRIVER_TPM_I2C_BUS
@@ -58,3 +37,9 @@ config DRIVER_TPM_DISPLAY_TIS_BYTES
 	bool "TPM: Display the TIS transactions to I2C TPM chip"
 	default n
 	depends on I2C_TPM
+
+config TPM_ATMEL
+	bool
+	default n
+	help
+	  The mainboard has an Atmel TPM chip.
diff --git a/src/drivers/i2c/tpm/Makefile.inc b/src/drivers/i2c/tpm/Makefile.inc
@@ -1,25 +1,15 @@
-ramstage-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
-romstage-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
-verstage-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
-bootblock-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
-postcar-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
+ifeq ($(CONFIG_TPM)$(CONFIG_I2C_TPM),yy)
 
-ramstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
-romstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
-verstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
-bootblock-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
-postcar-$(CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL) += tis_atmel.c
+all-$(CONFIG_DRIVER_TIS_DEFAULT) += tis.c
 
-ramstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
-romstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
-verstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
-bootblock-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
-postcar-$(CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC) += tpm.c
+ifeq ($(CONFIG_TPM_ATMEL),y)
+all-y += tis_atmel.c
+else ifeq ($(CONFIG_TPM_GOOGLE),y)
+all-y += cr50.c
+else
+all-y += tpm.c
+endif
 
-ramstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
-romstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
-verstage-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
-bootblock-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
-postcar-$(CONFIG_MAINBOARD_HAS_I2C_TPM_CR50) += cr50.c
+endif
 
 ramstage-$(CONFIG_DRIVER_I2C_TPM_ACPI) += chip.c
diff --git a/src/drivers/pc80/tpm/Kconfig b/src/drivers/pc80/tpm/Kconfig
@@ -1,10 +1,10 @@
-config MAINBOARD_HAS_LPC_TPM
+config MEMORY_MAPPED_TPM
 	bool
 	default n
 	help
-	  Board has LPC TPM support
+	  Board has memory mapped TPM support
 
-if MAINBOARD_HAS_LPC_TPM
+if MEMORY_MAPPED_TPM
 
 config TPM_TIS_BASE_ADDRESS
 	hex

diff --git a/src/drivers/pc80/tpm/Makefile.inc b/src/drivers/pc80/tpm/Makefile.inc
@@ -1,5 +1,3 @@
-bootblock-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
-verstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
-romstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
-ramstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
-postcar-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
+ifeq ($(CONFIG_MEMORY_MAPPED_TPM),y)
+all-y += tis.c
+endif
diff --git a/src/drivers/spi/tpm/Kconfig b/src/drivers/spi/tpm/Kconfig
@@ -12,17 +12,3 @@ config DRIVER_TPM_SPI_CHIP
 	int "Chip Select of the TPM chip on its SPI bus"
 	default 0
 	depends on SPI_TPM
-
-config MAINBOARD_HAS_SPI_TPM_CR50
-	bool
-	default n
-	select MAINBOARD_HAS_SPI_TPM
-	help
-	  Board has a CR50 SPI TPM
-
-config MAINBOARD_HAS_SPI_TPM
-	bool
-	default n
-	select SPI_TPM
-	help
-	  Board has SPI TPM support
diff --git a/src/drivers/spi/tpm/Makefile.inc b/src/drivers/spi/tpm/Makefile.inc
@@ -1,5 +1,3 @@
-bootblock-$(CONFIG_SPI_TPM) += tis.c tpm.c
-verstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
-romstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
-ramstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
-postcar-$(CONFIG_SPI_TPM) += tis.c tpm.c
+ifeq ($(CONFIG_TPM)$(CONFIG_SPI_TPM),yy)
+all-y += tis.c tpm.c
+endif
diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c
@@ -104,7 +104,7 @@ static enum cb_err start_transaction(int read_write, size_t bytes, unsigned int
 	static int tpm_sync_needed;
 	static struct stopwatch wake_up_sw;
 
-	if (CONFIG(TPM_CR50)) {
+	if (CONFIG(TPM_GOOGLE)) {
 		/*
 		 * First Cr50 access in each coreboot stage where TPM is used will be
 		 * prepended by a wake up pulse on the CS line.
@@ -186,7 +186,7 @@ static enum cb_err start_transaction(int read_write, size_t bytes, unsigned int
 	 */
 
 	header_resp.body[3] = 0;
-	if (CONFIG(TPM_CR50))
+	if (CONFIG(TPM_GOOGLE))
 		ret = spi_xfer(&spi_slave, header.body, sizeof(header.body), NULL, 0);
 	else
 		ret = spi_xfer(&spi_slave, header.body, sizeof(header.body),
@@ -497,7 +497,7 @@ int tpm2_init(struct spi_slave *spi_if)
 	       tpm_info.vendor_id, tpm_info.device_id, tpm_info.revision);
 
 	/* Do some cr50-specific things here. */
-	if (CONFIG(TPM_CR50) && tpm_info.vendor_id == 0x1ae0) {
+	if (CONFIG(TPM_GOOGLE) && tpm_info.vendor_id == 0x1ae0) {
 		struct cr50_firmware_version ver;
 
 		if (tpm_first_access_this_boot()) {

diff --git a/src/drivers/tpm/Makefile.inc b/src/drivers/tpm/Makefile.inc
@@ -1,3 +1,5 @@
+ifeq ($(CONFIG_TPM),y)
+
 ramstage-$(CONFIG_TPM_INIT_RAMSTAGE) += tpm.c
 
 ifeq ($(CONFIG_TPM_PPI),y)
@@ -6,8 +8,6 @@ else
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ppi_stub.c
 endif
 
-bootblock-$(CONFIG_TPM_CR50) += cr50.c
-verstage-$(CONFIG_TPM_CR50) += cr50.c
-romstage-$(CONFIG_TPM_CR50) += cr50.c
-ramstage-$(CONFIG_TPM_CR50) += cr50.c
-postcar-$(CONFIG_TPM_CR50) += cr50.c
+all-$(CONFIG_TPM_GOOGLE) += cr50.c
+
+endif
diff --git a/src/mainboard/acer/aspire_vn7_572g/Kconfig b/src/mainboard/acer/aspire_vn7_572g/Kconfig
@@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select INTEL_GMA_HAVE_VBT
 	select INTEL_INT15
 	select INTEL_LPSS_UART_FOR_CONSOLE
-	select MAINBOARD_HAS_CRB_TPM
+	select CRB_TPM
 	select MAINBOARD_HAS_LIBGFXINIT
 	select MAINBOARD_HAS_TPM2
 	select NO_UART_ON_SUPERIO

diff --git a/src/mainboard/asrock/b85m_pro4/Kconfig b/src/mainboard/asrock/b85m_pro4/Kconfig
@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select HAVE_OPTION_TABLE
 	select INTEL_GMA_HAVE_VBT
 	select MAINBOARD_HAS_LIBGFXINIT
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_USES_IFD_GBE_REGION
 	select NORTHBRIDGE_INTEL_HASWELL
 	select SERIRQ_CONTINUOUS_MODE

diff --git a/src/mainboard/asrock/h110m/Kconfig b/src/mainboard/asrock/h110m/Kconfig
@@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select SUPERIO_NUVOTON_NCT6791D
 	select REALTEK_8168_RESET
 	select RT8168_SET_LED_MODE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 
 config DISABLE_HECI1_AT_PRE_BOOT
 	default y

diff --git a/src/mainboard/asus/am1i-a/Kconfig b/src/mainboard/asus/am1i-a/Kconfig
@@ -18,7 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select SOUTHBRIDGE_AMD_AGESA_YANGTZE
 	select DEFAULT_POST_ON_LPC
 	select SUPERIO_ITE_IT8623E
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 
 config MAINBOARD_DIR
 	default "asus/am1i-a"

diff --git a/src/mainboard/asus/h61-series/Kconfig.name b/src/mainboard/asus/h61-series/Kconfig.name
@@ -34,7 +34,7 @@ config BOARD_ASUS_P8H61_M_PRO
 	select DRIVERS_ASMEDIA_ASPM_BLACKLIST
 	select HAVE_CMOS_DEFAULT
 	select HAVE_OPTION_TABLE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select REALTEK_8168_RESET
 	select RT8168_SET_LED_MODE
 	select SUPERIO_NUVOTON_NCT6776
@@ -46,7 +46,7 @@ config BOARD_ASUS_P8H61_M_PRO_CM6630
 	select DRIVERS_ASMEDIA_ASPM_BLACKLIST
 	select HAVE_CMOS_DEFAULT
 	select HAVE_OPTION_TABLE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select REALTEK_8168_RESET
 	select RT8168_SET_LED_MODE
 	select SUPERIO_NUVOTON_NCT6776
diff --git a/src/mainboard/asus/p8x7x-series/Kconfig.name b/src/mainboard/asus/p8x7x-series/Kconfig.name
@@ -2,7 +2,7 @@ config BOARD_ASUS_P8C_WS
 	bool "P8C_WS"
 	select BOARD_ASUS_P8X7X_SERIES
 	select BOARD_ROMSIZE_KB_8192
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select SUPERIO_NUVOTON_NCT6776
 	select USE_NATIVE_RAMINIT
 
@@ -18,7 +18,7 @@ config BOARD_ASUS_P8Z77_M_PRO
 	select BOARD_ASUS_P8X7X_SERIES
 	select BOARD_ROMSIZE_KB_8192
 	select DRIVERS_ASMEDIA_ASPM_BLACKLIST # for ASM1061 eSATA
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select SUPERIO_NUVOTON_NCT6779D
 
 config BOARD_ASUS_P8Z77_V_LX2
@@ -34,7 +34,7 @@ config BOARD_ASUS_P8Z77_V
 	select BOARD_ASUS_P8X7X_SERIES
 	select BOARD_ROMSIZE_KB_8192
 	select DRIVERS_ASMEDIA_ASPM_BLACKLIST # for ASM1061 eSATA
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_USES_IFD_GBE_REGION
 	select SUPERIO_NUVOTON_NCT6779D
 	select USE_NATIVE_RAMINIT

diff --git a/src/mainboard/clevo/cml-u/Kconfig b/src/mainboard/clevo/cml-u/Kconfig
@@ -9,7 +9,7 @@ config BOARD_CLEVO_CMLU_COMMON
 	select INTEL_GMA_HAVE_VBT
 	select INTEL_LPSS_UART_FOR_CONSOLE
 	select MAINBOARD_HAS_LIBGFXINIT
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
 	select NO_UART_ON_SUPERIO
 	select SOC_INTEL_COMETLAKE_1

diff --git a/src/mainboard/clevo/kbl-u/Kconfig b/src/mainboard/clevo/kbl-u/Kconfig
@@ -10,7 +10,7 @@ config BOARD_CLEVO_KBLU_COMMON
 	select INTEL_GMA_HAVE_VBT
 	select INTEL_LPSS_UART_FOR_CONSOLE
 	select MAINBOARD_HAS_LIBGFXINIT
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
 	select NO_UART_ON_SUPERIO
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB

diff --git a/src/mainboard/clevo/tgl-u/Kconfig b/src/mainboard/clevo/tgl-u/Kconfig
@@ -9,7 +9,7 @@ config BOARD_CLEVO_TGLU_COMMON
 	select HAVE_OPTION_TABLE
 	select INTEL_GMA_HAVE_VBT
 	select INTEL_LPSS_UART_FOR_CONSOLE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
 	select NO_UART_ON_SUPERIO
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB

diff --git a/src/mainboard/dell/snb_ivb_workstations/Kconfig b/src/mainboard/dell/snb_ivb_workstations/Kconfig
@@ -7,7 +7,7 @@ config BOARD_DELL_SNB_IVB_WORKSTATIONS
 	select NORTHBRIDGE_INTEL_SANDYBRIDGE
 	select SERIRQ_CONTINUOUS_MODE
 	select USE_NATIVE_RAMINIT
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM1
 	select MAINBOARD_USES_IFD_GBE_REGION
 	select SUPERIO_SMSC_SCH5545

diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig
@@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select BOARD_ROMSIZE_KB_16384 if VBOOT
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select MAINBOARD_FORCE_NATIVE_VGA_INIT if !CHROMEOS
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_CHROMEOS
 	select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
 	select BOOT_DEVICE_NOT_SPI_FLASH

diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig
@@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select HAVE_IFD_BIN
 	select HAVE_ME_BIN
 	select HAVE_OPTION_TABLE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
 	select SOC_INTEL_BRASWELL
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB

diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig
@@ -7,7 +7,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
 	select SOC_INTEL_KABYLAKE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
 	select MAINBOARD_USES_IFD_GBE_REGION
 	select INTEL_GMA_HAVE_VBT

diff --git a/src/mainboard/foxconn/g41s-k/Kconfig b/src/mainboard/foxconn/g41s-k/Kconfig
@@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select HAVE_ACPI_TABLES
 	select HAVE_CMOS_DEFAULT
 	select HAVE_OPTION_TABLE
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select INTEL_GMA_HAVE_VBT
 	select MAINBOARD_HAS_LIBGFXINIT
 

diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
@@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select INTEL_INT15
 	select SERIRQ_CONTINUOUS_MODE
 	select MAINBOARD_HAS_LIBGFXINIT
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 
 config DRAM_RESET_GATE_GPIO
 	int

diff --git a/src/mainboard/google/asurada/Kconfig b/src/mainboard/google/asurada/Kconfig
@@ -23,7 +23,8 @@ config BOARD_SPECIFIC_OPTIONS
 	select EC_GOOGLE_CHROMEEC
 	select EC_GOOGLE_CHROMEEC_BOARDID
 	select EC_GOOGLE_CHROMEEC_SPI
-	select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
+	select SPI_TPM if VBOOT
+	select TPM_GOOGLE_CR50 if VBOOT
 	select MAINBOARD_HAS_TPM2 if VBOOT
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select MAINBOARD_FORCE_NATIVE_VGA_INIT

diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
@@ -10,7 +10,7 @@ config BOARD_GOOGLE_BASEBOARD_AURON
 	select INTEL_INT15
 	select MAINBOARD_HAS_CHROMEOS
 	select MAINBOARD_HAS_LIBGFXINIT
-	select MAINBOARD_HAS_LPC_TPM
+	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM1
 	select SOC_INTEL_BROADWELL