[backport] 8135018: AARCH64: Missing memory barriers for CMS collector

corretto · Dec 17, 2019 · 4bec425 · 4bec425
1 parent c92d7dc
commit 4bec425
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Showing 3 changed files with 12 additions and 0 deletions.
diff --git a/src/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp b/src/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
@@ -3135,6 +3135,10 @@ void MacroAssembler::store_check_part_2(Register obj) {
   // don't bother to check, but it could save an instruction.
   intptr_t disp = (intptr_t) ct->byte_map_base;
   load_byte_map_base(rscratch1);
+
+  if (UseConcMarkSweepGC && CMSPrecleaningEnabled) {
+      membar(StoreStore);
+  }
   strb(zr, Address(obj, rscratch1));
 }
 

diff --git a/src/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp b/src/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp
@@ -678,6 +678,9 @@ class StubGenerator: public StubCodeGenerator {
           const Register count = end; // 'end' register contains bytes count now
           __ load_byte_map_base(scratch);
           __ add(start, start, scratch);
+          if (UseConcMarkSweepGC) {
+            __ membar(__ StoreStore);
+          }
 	  __ BIND(L_loop);
 	  __ strb(zr, Address(start, count));
           __ subs(count, count, 1);

diff --git a/src/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp b/src/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp
@@ -1607,6 +1607,11 @@ void LIRGenerator::CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc*
   } else {
     __ unsigned_shift_right(addr, CardTableModRefBS::card_shift, tmp);
   }
+
+  if (UseConcMarkSweepGC && CMSPrecleaningEnabled) {
+    __ membar_storestore();
+  }
+
   if (can_inline_as_constant(card_table_base)) {
     __ move(LIR_OprFact::intConst(0),
               new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE));