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fix tests
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@calebmkim
calebmkim committed Apr 1, 2024
1 parent a255c6b commit 1229734
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Showing 4 changed files with 31 additions and 73 deletions.
30 changes: 9 additions & 21 deletions file-tests/should-futil/for-multi-dim.expect
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Original file line number Diff line number Diff line change
Expand Up @@ -10,33 +10,21 @@ component main() -> () {
add1 = std_add(2);
add2 = std_add(4);
const0 = std_const(4,0);
const1 = std_const(4,9);
const2 = std_const(2,0);
const1 = std_const(2,0);
const2 = std_const(32,1);
const3 = std_const(2,1);
const4 = std_const(32,1);
const5 = std_const(2,1);
const6 = std_const(4,1);
const4 = std_const(4,1);
i0 = std_reg(4);
j0 = std_reg(2);
le0 = std_le(4);
le1 = std_le(2);
}
wires {
comb group cond0 {
le0.left = i0.out;
le0.right = const1.out;
}
comb group cond1 {
le1.left = j0.out;
le1.right = const3.out;
}
group let0<"promotable"=1> {
i0.in = const0.out;
i0.write_en = 1'd1;
let0[done] = i0.done;
}
group let1<"promotable"=1> {
j0.in = const2.out;
j0.in = const1.out;
j0.write_en = 1'd1;
let1[done] = j0.done;
}
Expand All @@ -54,32 +42,32 @@ component main() -> () {
B.addr0 = i0.out;
B.write_en = 1'd1;
add0.left = A_read0_0.out;
add0.right = const4.out;
add0.right = const2.out;
B.write_data = add0.out;
upd0[done] = B.done;
}
group upd1<"promotable"=1> {
j0.write_en = 1'd1;
add1.left = j0.out;
add1.right = const5.out;
add1.right = const3.out;
j0.in = add1.out;
upd1[done] = j0.done;
}
group upd2<"promotable"=1> {
i0.write_en = 1'd1;
add2.left = i0.out;
add2.right = const6.out;
add2.right = const4.out;
i0.in = add2.out;
upd2[done] = i0.done;
}
}
control {
seq {
@pos(0) let0;
@bound(10) while le0.out with cond0 {
repeat 10 {
seq {
@pos(1) let1;
@bound(2) while le1.out with cond1 {
repeat 2 {
seq {
@pos(2) let2;
@pos(3) upd0;
Expand Down
16 changes: 5 additions & 11 deletions file-tests/should-futil/for.expect
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Original file line number Diff line number Diff line change
Expand Up @@ -9,17 +9,11 @@ component main() -> () {
add0 = std_sadd(32);
add1 = std_add(4);
const0 = std_const(4,0);
const1 = std_const(4,9);
const2 = std_const(32,1);
const3 = std_const(4,1);
const1 = std_const(32,1);
const2 = std_const(4,1);
i0 = std_reg(4);
le0 = std_le(4);
}
wires {
comb group cond0 {
le0.left = i0.out;
le0.right = const1.out;
}
group let0<"promotable"=1> {
i0.in = const0.out;
i0.write_en = 1'd1;
Expand All @@ -37,22 +31,22 @@ component main() -> () {
B.addr0 = i0.out;
B.write_en = 1'd1;
add0.left = A_read0_0.out;
add0.right = const2.out;
add0.right = const1.out;
B.write_data = add0.out;
upd0[done] = B.done;
}
group upd1<"promotable"=1> {
i0.write_en = 1'd1;
add1.left = i0.out;
add1.right = const3.out;
add1.right = const2.out;
i0.in = add1.out;
upd1[done] = i0.done;
}
}
control {
seq {
@pos(0) let0;
@bound(10) while le0.out with cond0 {
repeat 10 {
seq {
@pos(1) let1;
@pos(2) upd0;
Expand Down
30 changes: 9 additions & 21 deletions file-tests/should-futil/sequentialize-reduce.expect
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,39 +7,27 @@ component main() -> () {
add1 = std_add(4);
add2 = std_add(4);
const0 = std_const(4,0);
const1 = std_const(4,9);
const1 = std_const(4,0);
const2 = std_const(4,0);
const3 = std_const(4,0);
const4 = std_const(4,9);
const5 = std_const(4,1);
const6 = std_const(4,1);
const3 = std_const(4,1);
const4 = std_const(4,1);
i0 = std_reg(4);
j0 = std_reg(4);
le0 = std_le(4);
le1 = std_le(4);
x_0 = std_reg(4);
}
wires {
comb group cond0 {
le0.left = i0.out;
le0.right = const1.out;
}
comb group cond1 {
le1.left = j0.out;
le1.right = const4.out;
}
group let0<"promotable"=1> {
i0.in = const0.out;
i0.write_en = 1'd1;
let0[done] = i0.done;
}
group let1<"promotable"=1> {
x_0.in = const2.out;
x_0.in = const1.out;
x_0.write_en = 1'd1;
let1[done] = x_0.done;
}
group let2<"promotable"=1> {
j0.in = const3.out;
j0.in = const2.out;
j0.write_en = 1'd1;
let2[done] = j0.done;
}
Expand All @@ -53,26 +41,26 @@ component main() -> () {
group upd1<"promotable"=1> {
j0.write_en = 1'd1;
add1.left = j0.out;
add1.right = const5.out;
add1.right = const3.out;
j0.in = add1.out;
upd1[done] = j0.done;
}
group upd2<"promotable"=1> {
i0.write_en = 1'd1;
add2.left = i0.out;
add2.right = const6.out;
add2.right = const4.out;
i0.in = add2.out;
upd2[done] = i0.done;
}
}
control {
seq {
@pos(0) let0;
@bound(10) while le0.out with cond0 {
repeat 10 {
seq {
@pos(1) let1;
@pos(2) let2;
@bound(10) while le1.out with cond1 {
repeat 10 {
seq {
upd0;
@pos(2) upd1;
Expand Down
28 changes: 8 additions & 20 deletions file-tests/should-futil/use-plus-equals.expect
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,25 +11,13 @@ component use_plus_equals() -> () {
add1 = std_add(2);
add2 = std_add(1);
const0 = std_const(1,0);
const1 = std_const(1,0);
const2 = std_const(2,0);
const3 = std_const(2,1);
const4 = std_const(2,1);
const5 = std_const(1,1);
const1 = std_const(2,0);
const2 = std_const(2,1);
const3 = std_const(1,1);
fp_const0 = std_const(32,131072);
le0 = std_le(1);
le1 = std_le(2);
red_read00 = std_reg(32);
}
wires {
comb group cond0 {
le0.left = __i0.out;
le0.right = const1.out;
}
comb group cond1 {
le1.left = __j0.out;
le1.right = const3.out;
}
group let0<"promotable"=1> {
__i0.in = const0.out;
__i0.write_en = 1'd1;
Expand All @@ -41,7 +29,7 @@ component use_plus_equals() -> () {
let1[done] = __x_0.done;
}
group let2<"promotable"=1> {
__j0.in = const2.out;
__j0.in = const1.out;
__j0.write_en = 1'd1;
let2[done] = __j0.done;
}
Expand All @@ -66,26 +54,26 @@ component use_plus_equals() -> () {
group upd1<"promotable"=1> {
__j0.write_en = 1'd1;
add1.left = __j0.out;
add1.right = const4.out;
add1.right = const2.out;
__j0.in = add1.out;
upd1[done] = __j0.done;
}
group upd2<"promotable"=1> {
__i0.write_en = 1'd1;
add2.left = __i0.out;
add2.right = const5.out;
add2.right = const3.out;
__i0.in = add2.out;
upd2[done] = __i0.done;
}
}
control {
seq {
@pos(0) let0;
@bound(1) while le0.out with cond0 {
repeat 1 {
seq {
@pos(1) let1;
@pos(2) let2;
@bound(2) while le1.out with cond1 {
repeat 2 {
seq {
let3;
upd0;
Expand Down

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