This repository has been archived by the owner on Oct 8, 2021. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 6
Algorithms
CYRIL INGENIERIE edited this page Mar 25, 2015
·
1 revision
XFreq is split in 3 algorithms :
1- Nehalem architecture and superior, based on the fixed performances counters
- step a- Initialize counters, write the MSR registers:
- IA32_PERF_GLOBAL_CTRL (0x38f)
- IA32_FIXED_CTR_CTRL (0x38d)
- step b- Read the MSR registers:
- IA32_FIXED_CTR0 (0x309)
- IA32_FIXED_CTR1(0x30a)
- IA32_FIXED_CTR2 (0x30b)
- IA32_TIME_STAMP_COUNTER (0x10)
- MSR_CORE_C3_RESIDENCY (0x3fc)
- MSR_CORE_C6_RESIDENCY(0x3fd)
- step c- Compute and display
- ratios: * Relative frequency ratio * IPS * IPC * CPI
- c-states:
* Turbo
[UCC]
&[URC]
* C0 * C1 * C3 * C6 - step d- Loop to step b
2- Core 2 algorithm, similar to the previous one, except that there is none MSR_CORE_C3_RESIDENCY and MSR_CORE_C6_RESIDENCY.
- step a- Initialize counters
- step b- Read the IA32_FIXED_CTR MSRs
- step c- only C0 and C1 states are taken into account.
- step d- Loop to step b
3- A fallback algorithm for Genuine architectures:
- step a- Read the MSR IA32_APERF (0xe8) , IA32_MPERF (0xe7) and IA32_TIME_STAMP_COUNTER (0x10)
- step b- Computes, displays C0 and C1 states only from values read in step a
- step c- Loop to step a
When the server starts and the processor signature is detected from CPUID, one of the 3 algorithms is selected then launched. If you noticed wrong counters values, you can select another algorithm from the Architectures table.