v2.2.1

Fixed

• ebuild recipe (thx MFF sysadmins)
• RISC-V TLB documentation (@vhotspur, @HanyzPAPU)
• ReadTheDocs configuration (@vhotspur)

Changed

• EBREAK instruction on RISC-V halts simulation without TTY (as is done on MIPS) (@vhotspur)
• move changelog to a more structured format (@vhotspur)

v2.2.0

Release 2.2.0

v2.1.2

Release 2.1.2

v2.1.1

Release 2.1.1

v2.1.0

• Documentation moved to https://msim.readthedocs.io/
• Add simulated TLB for RISC-V (PR #36)

v2.0.0

Release 2.0.0 brought support of RISC-V processor to MSIM. See pull request #25 for the patch by Jan Papesch that made it possible.