Pinned

1. learnverilog.v learnverilog.v Public

   A verilog file containing all of the verilog syntax and common expressions.

   Verilog 2

2. Solving-SAT-in-FPGA-UCSB Solving-SAT-in-FPGA-UCSB Public

   Creating a hardware solver in Verilog and then uploading to FPGA and connecting to a PC to solve SAT problems.

   Jupyter Notebook 2 1

3. UCSB-SAT-Benchmarking UCSB-SAT-Benchmarking Public

   Data and plotting functions for benchmarking work done during UCSB PhD of SAT and MAXSAT solvers

   Jupyter Notebook

4. Altium_Public_Portfolio Altium_Public_Portfolio Public

   Daniel Espinosa's professional PCB Design / Altium portfolio.

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