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[BasicAA] Add extra scalable typesize and offset tests. NFC
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A collection of tests from llvm#69152 and for constant offsets with scalable typesizes.
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@davemgreen
davemgreen committed Feb 2, 2024
1 parent 75c4339 commit 70f6109
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204 changes: 204 additions & 0 deletions llvm/test/Analysis/BasicAA/vscale.ll
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Expand Up @@ -117,6 +117,36 @@ define void @gep_different_base_const_offset(ptr noalias %p1, ptr noalias %p2) {
ret void
}

; getelementptr @llvm.vscale tests
; CHECK-LABEL: gep_llvm_vscale_no_alias
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep1, <vscale x 4 x i32>* %gep2
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep1, <vscale x 4 x i32>* %gep3
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep2, <vscale x 4 x i32>* %gep3
define void @gep_llvm_vscale_no_alias(ptr %p) {
%t1 = tail call i64 @llvm.vscale.i64()
%t2 = shl nuw nsw i64 %t1, 3
%gep1 = getelementptr i32, ptr %p, i64 %t2
%gep2 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
%gep3 = getelementptr <vscale x 4 x i32>, ptr %p, i64 2
load <vscale x 4 x i32>, ptr %gep1
load <vscale x 4 x i32>, ptr %gep2
load <vscale x 4 x i32>, ptr %gep3
ret void
}

declare i64 @llvm.vscale.i64()

; CHECK-LABEL: gep_llvm_vscale_squared_may_alias
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep1, <vscale x 4 x i32>* %gep2
define void @gep_llvm_vscale_squared_may_alias(ptr %p) {
%t1 = tail call i64 @llvm.vscale.i64()
%gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 %t1
%gep2 = getelementptr i32, ptr %p, i64 1
load <vscale x 4 x i32>, ptr %gep1
load <vscale x 4 x i32>, ptr %gep2
ret void
}

; getelementptr + bitcast

; CHECK-LABEL: gep_bitcast_1
Expand Down Expand Up @@ -153,6 +183,132 @@ define void @gep_bitcast_2(ptr %p) {
ret void
}

; negative offset tests

; CHECK-LABEL: gep_neg_notscalable
; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16m16
; CHECK-DAG: NoAlias: <4 x i32>* %vm16, <4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %p
; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %m16pv16
; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16m16
define void @gep_neg_notscalable(ptr %p) vscale_range(1,16) {
%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 -1
%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 -1
%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %m16, i64 1
load <4 x i32>, ptr %p
load <4 x i32>, ptr %vm16
load <4 x i32>, ptr %m16
load <4 x i32>, ptr %vm16m16
load <4 x i32>, ptr %m16pv16
ret void
}

; CHECK-LABEL: gep_neg_scalable
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %m16pv16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16m16
define void @gep_neg_scalable(ptr %p) vscale_range(1,16) {
%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 -1
%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 -1
%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %vm16, i64 1
load <vscale x 4 x i32>, ptr %p
load <vscale x 4 x i32>, ptr %vm16
load <vscale x 4 x i32>, ptr %m16
load <vscale x 4 x i32>, ptr %vm16m16
load <vscale x 4 x i32>, ptr %m16pv16
ret void
}

; CHECK-LABEL: gep_pos_notscalable
; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16m16
; CHECK-DAG: NoAlias: <4 x i32>* %vm16, <4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %p
; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %m16pv16
; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16m16
define void @gep_pos_notscalable(ptr %p) vscale_range(1,16) {
%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
%m16 = getelementptr <4 x i32>, ptr %p, i64 1
%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 1
%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %vm16, i64 -1
load <4 x i32>, ptr %p
load <4 x i32>, ptr %vm16
load <4 x i32>, ptr %m16
load <4 x i32>, ptr %vm16m16
load <4 x i32>, ptr %m16pv16
ret void
}

; CHECK-LABEL: gep_pos_scalable
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16m16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %m16pv16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16m16
define void @gep_pos_scalable(ptr %p) vscale_range(1,16) {
%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
%m16 = getelementptr <4 x i32>, ptr %p, i64 1
%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 1
%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %vm16, i64 -1
load <vscale x 4 x i32>, ptr %p
load <vscale x 4 x i32>, ptr %vm16
load <vscale x 4 x i32>, ptr %m16
load <vscale x 4 x i32>, ptr %vm16m16
load <vscale x 4 x i32>, ptr %m16pv16
ret void
}

; CHECK-LABEL: v1v2types
; CHECK-DAG: MustAlias: <4 x i32>* %p, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %p, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
; CHECK-DAG: MustAlias: <4 x i32>* %vm16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %p
; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %vm16
; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
; CHECK-DAG: MustAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %m16
define void @v1v2types(ptr %p) vscale_range(1,16) {
%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 -1
%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
load <vscale x 4 x i32>, ptr %p
load <4 x i32>, ptr %p
load <vscale x 4 x i32>, ptr %vm16
load <4 x i32>, ptr %vm16
load <vscale x 4 x i32>, ptr %m16
load <4 x i32>, ptr %m16
ret void
}

; getelementptr recursion

; CHECK-LABEL: gep_recursion_level_1
Expand Down Expand Up @@ -269,3 +425,51 @@ define void @gep_recursion_max_lookup_depth_reached(ptr %a, ptr %p) {
load i32, ptr %gep_rec_6
ret void
}

; CHECK-LABEL: gep_2048
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off255
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off256, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %off256
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off256
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off255
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %noff256
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off256
define void @gep_2048(ptr %p) {
%off255 = getelementptr i8, ptr %p, i64 255
%noff255 = getelementptr i8, ptr %p, i64 -255
%off256 = getelementptr i8, ptr %p, i64 256
%noff256 = getelementptr i8, ptr %p, i64 -256
load <vscale x 4 x i32>, ptr %p
load <vscale x 4 x i32>, ptr %off255
load <vscale x 4 x i32>, ptr %noff255
load <vscale x 4 x i32>, ptr %off256
load <vscale x 4 x i32>, ptr %noff256
ret void
}

; CHECK-LABEL: gep_2048_vscalerange
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off255
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off256, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %off256
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off256
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %p
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off255
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %noff256
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off256
define void @gep_2048_vscalerange(ptr %p) vscale_range(1,16) {
%off255 = getelementptr i8, ptr %p, i64 255
%noff255 = getelementptr i8, ptr %p, i64 -255
%off256 = getelementptr i8, ptr %p, i64 256
%noff256 = getelementptr i8, ptr %p, i64 -256
load <vscale x 4 x i32>, ptr %p
load <vscale x 4 x i32>, ptr %off255
load <vscale x 4 x i32>, ptr %noff255
load <vscale x 4 x i32>, ptr %off256
load <vscale x 4 x i32>, ptr %noff256
ret void
}

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