Skip to content

Commit

Permalink
Honor IRQ offset set in ICW2
Browse files Browse the repository at this point in the history
  • Loading branch information
dbalsom committed Aug 15, 2023
1 parent 2b5d14b commit ca0441c
Show file tree
Hide file tree
Showing 2 changed files with 7 additions and 4 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
@@ -1,6 +1,7 @@

## [0.1.4](https://github.com/dbalsom/martypc/releases/tag/0.1.4) (2023-08-XX)

* Honor IRQ offset specified in IWC2 to PIC
* Added MMIO peek functions. Allows Memory debug viewer to peek into MMIO regions, if device supports.
* Brand new, simplified BIU state logic
* Fixed & Improved DMA refresh scheduling. (Fixes 8088MPH CPU test)
Expand Down
10 changes: 6 additions & 4 deletions core/src/devices/pic.rs
Expand Up @@ -37,7 +37,7 @@
use crate::bus::{BusInterface, IoDevice, DeviceRunTimeUnit};


pub const PIC_INTERRUPT_OFFSET: u8 = 8;
//pub const PIC_INTERRUPT_OFFSET: u8 = 8;

pub const PIC_COMMAND_PORT: u16 = 0x20;
pub const PIC_DATA_PORT: u16 = 0x21;
Expand All @@ -48,6 +48,8 @@ const ICW1_ADI: u8 = 0b0000_0100; // Bit is set if PIC is using a c
const ICW1_LTIM: u8 = 0b0000_1000; // Bit is set if PIC is in Level Triggered Mode
const ICW1_IS_ICW1: u8 = 0b0001_0000; // Bit determines if input is ICW1

const ICW2_MASK: u8 = 0b1111_1000; // Bit mask for ICW2 offset

const ICW4_8088_MODE: u8 = 0b0000_0001; // Bit on if 8086/8088 mode (required)
const ICW4_AEOI_MODE: u8 = 0b0000_0010; // Bit on if Auto EOI is enabled
const ICW4_BUFFERED: u8 = 0b0000_1000; // Bit on if Buffered mode
Expand Down Expand Up @@ -172,7 +174,7 @@ impl Pic {
pub fn new() -> Self {
Self {
init_state: InitializationState::Normal,
int_offset: PIC_INTERRUPT_OFFSET, // Interrupt Vector Offset is always 8
int_offset: 0,
imr: 0xFF, // All IRQs initially masked
isr: 0x00,
irr: 0,
Expand Down Expand Up @@ -384,8 +386,8 @@ impl Pic {
}
InitializationState::ExpectingICW2 => {
// This value should be an ICW2 based on just receiving an ICW1 on control port

log::debug!("PIC: Read ICW2: {:02X}", byte);
self.int_offset = byte & ICW2_MASK;
self.init_state = InitializationState::ExpectingICW4;
return;
}
Expand Down Expand Up @@ -561,7 +563,7 @@ impl Pic {
// INT line low
self.intr = false;

return Some(irq + PIC_INTERRUPT_OFFSET)
return Some(irq | self.int_offset)
}
ir_bit <<= 1;
}
Expand Down

0 comments on commit ca0441c

Please sign in to comment.