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Achievement: Pull Shark

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Achievement: Pull Shark
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  1. AsynchronousFIFO AsynchronousFIFO Public

    Implemenation on Asynchronous FIFO using Verilog HDL. An additional bit was used to check Wrap Around Condition

    Verilog 1

  2. SynchronousFIFO SynchronousFIFO Public

    Implemenation on Synchronous FIFO using Verilog HDL. An additional bit was used to check Wrap Around Condition

    Verilog 1