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Re-add the sc+blr optimization removed in r457:721d85b14981.
Since we now pass the instruction word to the sc handler, the primary reason for removing the optimization (inability to read the instruction word) is no longer an issue. The optimization is left optional since it is still unsafe with respect to getting the address of the sc instruction. Fixes #13.
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Andrew Church
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Jan 11, 2019
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/* | ||
* libbinrec: a recompiling translator for machine code | ||
* Copyright (c) 2016 Andrew Church <achurch@achurch.org> | ||
* | ||
* This software may be copied and redistributed under certain conditions; | ||
* see the file "COPYING" in the source code distribution for details. | ||
* NO WARRANTY is provided with this software. | ||
*/ | ||
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#include "include/binrec.h" | ||
#include "src/endian.h" | ||
#include "tests/common.h" | ||
#include "tests/execute.h" | ||
#include "tests/guest-ppc/common.h" | ||
#include "tests/log-capture.h" | ||
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static uint32_t sc_r3; // Value of r3 at sc instruction. | ||
static uint32_t sc_nia; // Value of NIA at sc instruction. | ||
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static PPCState *sc_handler(PPCState *state, uint32_t insn) | ||
{ | ||
ASSERT(state); | ||
ASSERT(insn == 0x44000002); | ||
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sc_r3 = state->gpr[3]; | ||
sc_nia = state->nia; | ||
state->nia = 0x1018; | ||
return state; | ||
} | ||
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static void configure_handle(binrec_t *handle) | ||
{ | ||
const unsigned int guest_opt = BINREC_OPT_G_PPC_SC_BLR; | ||
binrec_set_optimization_flags(handle, 0, guest_opt, 0); | ||
} | ||
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int main(void) | ||
{ | ||
if (!binrec_host_supported(binrec_native_arch())) { | ||
printf("Skipping test because native architecture not supported.\n"); | ||
return EXIT_SUCCESS; | ||
} | ||
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uint8_t *memory; | ||
EXPECT(memory = malloc(0x10000)); | ||
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static const uint32_t ppc_code[] = { | ||
0x7C0802A6, // mflr r0 | ||
0x38601237, // li r3,0x1237 | ||
0x7C6803A6, // mtlr r3 | ||
0x38600001, // li r3,1 | ||
0x44000002, // sc | ||
0x4E800020, // blr | ||
0x7C0803A6, // mtlr r0 | ||
0x4E800020, // blr | ||
}; | ||
const uint32_t start_address = 0x1000; | ||
memcpy_be32(memory + start_address, ppc_code, sizeof(ppc_code)); | ||
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PPCState state; | ||
memset(&state, 0, sizeof(state)); | ||
state.sc_handler = sc_handler; | ||
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if (!call_guest_code(BINREC_ARCH_PPC_7XX, &state, memory, start_address, | ||
configure_handle, NULL)) { | ||
const char *log_messages = get_log_messages(); | ||
if (log_messages) { | ||
fputs(log_messages, stdout); | ||
} | ||
FAIL("Failed to execute guest code"); | ||
} | ||
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EXPECT_EQ(state.gpr[3], 1); | ||
EXPECT_EQ(sc_r3, 1); | ||
EXPECT_EQ(sc_nia, 0x1234); | ||
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free(memory); | ||
return EXIT_SUCCESS; | ||
} |
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/* | ||
* libbinrec: a recompiling translator for machine code | ||
* Copyright (c) 2016 Andrew Church <achurch@achurch.org> | ||
* | ||
* This software may be copied and redistributed under certain conditions; | ||
* see the file "COPYING" in the source code distribution for details. | ||
* NO WARRANTY is provided with this software. | ||
*/ | ||
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#include "tests/guest-ppc/insn/common.h" | ||
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/* Keep the blr outside the range of code to translate; the translator | ||
* should not optimize this case. */ | ||
static const struct { | ||
uint8_t input[4]; | ||
uint8_t extra[4]; | ||
} input_struct = { | ||
{0x44,0x00,0x00,0x02}, // sc | ||
{0x4E,0x80,0x00,0x20}, // blr | ||
}; | ||
#define input input_struct.input | ||
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static const unsigned int guest_opt = BINREC_OPT_G_PPC_SC_BLR; | ||
static const unsigned int common_opt = 0; | ||
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static const bool expected_success = true; | ||
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static const char expected[] = | ||
" 0: LOAD_ARG r1, 0\n" | ||
" 1: LOAD_ARG r2, 1\n" | ||
" 2: LOAD_IMM r3, 4\n" | ||
" 3: SET_ALIAS a1, r3\n" | ||
" 4: LOAD r4, 984(r1)\n" | ||
" 5: LOAD_IMM r5, 0x44000002\n" | ||
" 6: CALL r6, @r4, r1, r5\n" | ||
" 7: RETURN r6\n" | ||
" 8: LOAD_IMM r7, 4\n" | ||
" 9: SET_ALIAS a1, r7\n" | ||
" 10: RETURN r1\n" | ||
"\n" | ||
"Alias 1: int32 @ 964(r1)\n" | ||
"\n" | ||
"Block 0: <none> --> [0,7] --> <none>\n" | ||
"Block 1: <none> --> [8,10] --> <none>\n" | ||
; | ||
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#include "tests/rtl-disasm-test.i" |
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/* | ||
* libbinrec: a recompiling translator for machine code | ||
* Copyright (c) 2016 Andrew Church <achurch@achurch.org> | ||
* | ||
* This software may be copied and redistributed under certain conditions; | ||
* see the file "COPYING" in the source code distribution for details. | ||
* NO WARRANTY is provided with this software. | ||
*/ | ||
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#include "tests/guest-ppc/insn/common.h" | ||
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static const uint8_t input[] = { | ||
0x44,0x00,0x00,0x02, // sc | ||
0x4E,0x80,0x00,0x20, // blr | ||
}; | ||
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static const unsigned int guest_opt = BINREC_OPT_G_PPC_SC_BLR; | ||
static const unsigned int common_opt = 0; | ||
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static const bool expected_success = true; | ||
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static const char expected[] = | ||
" 0: LOAD_ARG r1, 0\n" | ||
" 1: LOAD_ARG r2, 1\n" | ||
" 2: GET_ALIAS r3, a2\n" | ||
" 3: ANDI r4, r3, -4\n" | ||
" 4: SET_ALIAS a1, r4\n" | ||
" 5: LOAD r5, 984(r1)\n" | ||
" 6: LOAD_IMM r6, 0x44000002\n" | ||
" 7: CALL r7, @r5, r1, r6\n" | ||
" 8: RETURN r7\n" | ||
" 9: LOAD_IMM r8, 8\n" | ||
" 10: SET_ALIAS a1, r8\n" | ||
" 11: RETURN r1\n" | ||
"\n" | ||
"Alias 1: int32 @ 964(r1)\n" | ||
"Alias 2: int32 @ 932(r1)\n" | ||
"\n" | ||
"Block 0: <none> --> [0,8] --> <none>\n" | ||
"Block 1: <none> --> [9,11] --> <none>\n" | ||
; | ||
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#include "tests/rtl-disasm-test.i" |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,41 @@ | ||
/* | ||
* libbinrec: a recompiling translator for machine code | ||
* Copyright (c) 2016 Andrew Church <achurch@achurch.org> | ||
* | ||
* This software may be copied and redistributed under certain conditions; | ||
* see the file "COPYING" in the source code distribution for details. | ||
* NO WARRANTY is provided with this software. | ||
*/ | ||
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#include "tests/guest-ppc/insn/common.h" | ||
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static const uint8_t input[] = { | ||
0x44,0x00,0x00,0x02, // sc | ||
0x60,0x00,0x00,0x00, // nop | ||
}; | ||
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static const unsigned int guest_opt = BINREC_OPT_G_PPC_SC_BLR; | ||
static const unsigned int common_opt = 0; | ||
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static const bool expected_success = true; | ||
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static const char expected[] = | ||
" 0: LOAD_ARG r1, 0\n" | ||
" 1: LOAD_ARG r2, 1\n" | ||
" 2: LOAD_IMM r3, 4\n" | ||
" 3: SET_ALIAS a1, r3\n" | ||
" 4: LOAD r4, 984(r1)\n" | ||
" 5: LOAD_IMM r5, 0x44000002\n" | ||
" 6: CALL r6, @r4, r1, r5\n" | ||
" 7: RETURN r6\n" | ||
" 8: LOAD_IMM r7, 4\n" | ||
" 9: SET_ALIAS a1, r7\n" | ||
" 10: RETURN r1\n" | ||
"\n" | ||
"Alias 1: int32 @ 964(r1)\n" | ||
"\n" | ||
"Block 0: <none> --> [0,7] --> <none>\n" | ||
"Block 1: <none> --> [8,10] --> <none>\n" | ||
; | ||
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#include "tests/rtl-disasm-test.i" |