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cod3.c
5463 lines (5034 loc) · 177 KB
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cod3.c
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// Copyright (C) 1984-1998 by Symantec
// Copyright (C) 2000-2011 by Digital Mars
// All Rights Reserved
// http://www.digitalmars.com
// Written by Walter Bright
/*
* This source file is made available for personal use
* only. The license is in /dmd/src/dmd/backendlicense.txt
* or /dm/src/dmd/backendlicense.txt
* For any other uses, please contact Digital Mars.
*/
#if !SPP
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include "cc.h"
#include "el.h"
#include "code.h"
#include "oper.h"
#include "global.h"
#include "type.h"
#include "parser.h"
#include "aa.h"
#include "tinfo.h"
#if SCPP
#include "cpp.h"
#include "exh.h"
#endif
static char __file__[] = __FILE__; /* for tassert.h */
#include "tassert.h"
#if MARS
#define tstrace NULL
#endif
extern targ_size_t retsize;
STATIC void pinholeopt_unittest();
STATIC void do8bit (enum FL,union evc *);
STATIC void do16bit (enum FL,union evc *,int);
STATIC void do32bit (enum FL,union evc *,int,targ_size_t = 0);
STATIC void do64bit (enum FL,union evc *,int);
static int hasframe; /* !=0 if this function has a stack frame */
static targ_size_t Foff; // BP offset of floating register
static targ_size_t CSoff; // offset of common sub expressions
static targ_size_t NDPoff; // offset of saved 8087 registers
int BPoff; // offset from BP
static int EBPtoESP; // add to EBP offset to get ESP offset
static int AAoff; // offset of alloca temporary
#if ELFOBJ || MACHOBJ
#define JMPSEG CDATA
#define JMPOFF CDoffset
#else
#define JMPSEG DATA
#define JMPOFF Doffset
#endif
/************************
* When we don't know whether a function symbol is defined or not
* within this module, we stuff it in this linked list of references
* to be fixed up later.
*/
struct fixlist
{ //symbol *Lsymbol; // symbol we don't know about
int Lseg; // where the fixup is going (CODE or DATA, never UDATA)
int Lflags; // CFxxxx
targ_size_t Loffset; // addr of reference to symbol
targ_size_t Lval; // value to add into location
#if TARGET_OSX
symbol *Lfuncsym; // function the symbol goes in
#endif
fixlist *Lnext; // next in threaded list
static AArray *start;
static int nodel; // don't delete from within searchfixlist
};
AArray *fixlist::start = NULL;
int fixlist::nodel = 0;
/*************
* Size in bytes of each instruction.
* 0 means illegal instruction.
* bit M: if there is a modregrm field (EV1 is reserved for modregrm)
* bit T: if there is a second operand (EV2)
* bit E: if second operand is only 8 bits
* bit A: a short version exists for the AX reg
* bit R: a short version exists for regs
* bits 2..0: size of instruction (excluding optional bytes)
*/
#define M 0x80
#define T 0x40
#define E 0x20
#define A 0x10
#define R 0x08
#define W 0
static unsigned char inssize[256] =
{ M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 00 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 08 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 10 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 18 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 20 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 28 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 30 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 38 */
1,1,1,1, 1,1,1,1, /* 40 */
1,1,1,1, 1,1,1,1, /* 48 */
1,1,1,1, 1,1,1,1, /* 50 */
1,1,1,1, 1,1,1,1, /* 58 */
1,1,M|2,M|2, 1,1,1,1, /* 60 */
T|3,M|T|4,T|E|2,M|T|E|3, 1,1,1,1, /* 68 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* 70 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* 78 */
M|T|E|A|3,M|T|A|4,M|T|E|3,M|T|E|3, M|2,M|2,M|2,M|A|R|2, /* 80 */
M|A|2,M|A|2,M|A|2,M|A|2, M|2,M|2,M|2,M|R|2, /* 88 */
1,1,1,1, 1,1,1,1, /* 90 */
1,1,T|5,1, 1,1,1,1, /* 98 */
#if 0 /* cod3_set386() patches this */
T|5,T|5,T|5,T|5, 1,1,1,1, /* A0 */
#else
T|3,T|3,T|3,T|3, 1,1,1,1, /* A0 */
#endif
T|E|2,T|3,1,1, 1,1,1,1, /* A8 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* B0 */
T|3,T|3,T|3,T|3, T|3,T|3,T|3,T|3, /* B8 */
M|T|E|3,M|T|E|3,T|3,1, M|2,M|2,M|T|E|R|3,M|T|R|4, /* C0 */
T|E|4,1,T|3,1, 1,T|E|2,1,1, /* C8 */
M|2,M|2,M|2,M|2, T|E|2,T|E|2,0,1, /* D0 */
/* For the floating instructions, allow room for the FWAIT */
M|2,M|2,M|2,M|2, M|2,M|2,M|2,M|2, /* D8 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* E0 */
T|3,T|3,T|5,T|E|2, 1,1,1,1, /* E8 */
1,0,1,1, 1,1,M|A|2,M|A|2, /* F0 */
1,1,1,1, 1,1,M|2,M|R|2 /* F8 */
};
static const unsigned char inssize32[256] =
{ 2,2,2,2, 2,5,1,1, /* 00 */
2,2,2,2, 2,5,1,1, /* 08 */
2,2,2,2, 2,5,1,1, /* 10 */
2,2,2,2, 2,5,1,1, /* 18 */
2,2,2,2, 2,5,1,1, /* 20 */
2,2,2,2, 2,5,1,1, /* 28 */
2,2,2,2, 2,5,1,1, /* 30 */
2,2,2,2, 2,5,1,1, /* 38 */
1,1,1,1, 1,1,1,1, /* 40 */
1,1,1,1, 1,1,1,1, /* 48 */
1,1,1,1, 1,1,1,1, /* 50 */
1,1,1,1, 1,1,1,1, /* 58 */
1,1,2,2, 1,1,1,1, /* 60 */
5,6,2,3, 1,1,1,1, /* 68 */
2,2,2,2, 2,2,2,2, /* 70 */
2,2,2,2, 2,2,2,2, /* 78 */
3,6,3,3, 2,2,2,2, /* 80 */
2,2,2,2, 2,2,2,2, /* 88 */
1,1,1,1, 1,1,1,1, /* 90 */
1,1,7,1, 1,1,1,1, /* 98 */
5,5,5,5, 1,1,1,1, /* A0 */
2,5,1,1, 1,1,1,1, /* A8 */
2,2,2,2, 2,2,2,2, /* B0 */
5,5,5,5, 5,5,5,5, /* B8 */
3,3,3,1, 2,2,3,6, /* C0 */
4,1,3,1, 1,2,1,1, /* C8 */
2,2,2,2, 2,2,0,1, /* D0 */
/* For the floating instructions, don't need room for the FWAIT */
2,2,2,2, 2,2,2,2, /* D8 */
2,2,2,2, 2,2,2,2, /* E0 */
5,5,7,2, 1,1,1,1, /* E8 */
1,0,1,1, 1,1,2,2, /* F0 */
1,1,1,1, 1,1,2,2 /* F8 */
};
/* For 2 byte opcodes starting with 0x0F */
static unsigned char inssize2[256] =
{ M|3,M|3,M|3,M|3, 2,2,2,2, // 00
2,2,M|3,2, 2,2,2,M|T|E|4, // 08
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 10
M|3,2,2,2, 2,2,2,2, // 18
M|3,M|3,M|3,M|3, M|3,2,M|3,2, // 20
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 28
2,2,2,2, 2,2,2,2, // 30
M|4,2,M|T|E|5,2, 2,2,2,2, // 38
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 40
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 48
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 50
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 58
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 60
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 68
M|T|E|4,M|T|E|4,M|T|E|4,M|T|E|4, M|3,M|3,M|3,2, // 70
2,2,2,2, M|3,M|3,M|3,M|3, // 78
W|T|4,W|T|4,W|T|4,W|T|4, W|T|4,W|T|4,W|T|4,W|T|4, // 80
W|T|4,W|T|4,W|T|4,W|T|4, W|T|4,W|T|4,W|T|4,W|T|4, // 88
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 90
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 98
2,2,2,M|3, M|T|E|4,M|3,2,2, // A0
2,2,2,M|3, M|T|E|4,M|3,M|3,M|3, // A8
M|E|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // B0
M|3,2,M|T|E|4,M|3, M|3,M|3,M|3,M|3, // B8
M|3,M|3,M|T|E|4,M|3, M|T|E|4,M|T|E|4,M|T|E|4,M|3, // C0
2,2,2,2, 2,2,2,2, // C8
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // D0
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // D8
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // E0
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // E8
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // F0
M|3,M|3,M|3,M|3, M|3,M|3,M|3,2 // F8
};
/************************************
* Determine if there is a modregrm byte for code.
*/
int cod3_EA(code *c)
{ unsigned ins;
unsigned op1 = c->Iop & 0xFF;
if (op1 == ESCAPE)
ins = 0;
else if ((c->Iop & 0xFFFD00) == 0x0F3800)
ins = inssize2[(c->Iop >> 8) & 0xFF];
else if ((c->Iop & 0xFF00) == 0x0F00)
ins = inssize2[op1];
else
ins = inssize[op1];
return ins & M;
}
/********************************
* Fix global variables for 386.
*/
void cod3_set386()
{
// if (I32)
{ unsigned i;
inssize[0xA0] = T|5;
inssize[0xA1] = T|5;
inssize[0xA2] = T|5;
inssize[0xA3] = T|5;
BPRM = 5; /* [EBP] addressing mode */
fregsaved = mBP | mBX | mSI | mDI; // saved across function calls
FLOATREGS = FLOATREGS_32;
FLOATREGS2 = FLOATREGS2_32;
DOUBLEREGS = DOUBLEREGS_32;
if (config.flags3 & CFG3eseqds)
fregsaved |= mES;
for (i = 0x80; i < 0x90; i++)
inssize2[i] = W|T|6;
}
#if 0
else
{
inssize[0xA0] = T|3;
inssize[0xA1] = T|3;
inssize[0xA2] = T|3;
inssize[0xA3] = T|3;
BPRM = 6; /* [EBP] addressing mode */
fregsaved = mSI | mDI; /* saved across function calls */
FLOATREGS = FLOATREGS_16;
FLOATREGS2 = FLOATREGS2_16;
DOUBLEREGS = DOUBLEREGS_16;
}
#endif
}
/********************************
* Fix global variables for I64.
*/
void cod3_set64()
{
inssize[0xA0] = T|5; // MOV AL,mem
inssize[0xA1] = T|5; // MOV RAX,mem
inssize[0xA2] = T|5; // MOV mem,AL
inssize[0xA3] = T|5; // MOV mem,RAX
BPRM = 5; // [RBP] addressing mode
fregsaved = mBP | mBX | mR12 | mR13 | mR14 | mR15 | mES; // saved across function calls
FLOATREGS = FLOATREGS_64;
FLOATREGS2 = FLOATREGS2_64;
DOUBLEREGS = DOUBLEREGS_64;
STACKALIGN = 16;
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
ALLREGS = mAX|mBX|mCX|mDX|mSI|mDI| mR8|mR9|mR10|mR11|mR12|mR13|mR14|mR15;
BYTEREGS = ALLREGS;
#endif
for (unsigned i = 0x80; i < 0x90; i++)
inssize2[i] = W|T|6;
}
/*********************************
* Word or dword align start of function.
*/
void cod3_align()
{
static char nops[7] = { 0x90,0x90,0x90,0x90,0x90,0x90,0x90 };
unsigned nbytes;
#if OMFOBJ
if (config.flags4 & CFG4speed) // if optimized for speed
{
// Pick alignment based on CPU target
if (config.target_cpu == TARGET_80486 ||
config.target_cpu >= TARGET_PentiumPro)
{ // 486 does reads on 16 byte boundaries, so if we are near
// such a boundary, align us to it
nbytes = -Coffset & 15;
if (nbytes < 8)
{
Coffset += obj_bytes(cseg,Coffset,nbytes,nops); // XCHG AX,AX
}
}
}
#else
nbytes = -Coffset & 3;
//dbg_printf("cod3_align Coffset %x nbytes %d\n",Coffset,nbytes);
obj_bytes(cseg,Coffset,nbytes,nops);
#endif
}
/*******************************
* Generate code for blocks ending in a switch statement.
* Take BCswitch and decide on
* BCifthen use if - then code
* BCjmptab index into jump table
* BCswitch search table for match
*/
void doswitch(block *b)
{ code *cc,*c,*ce;
regm_t retregs;
unsigned ncases,n,reg,reg2,rm;
targ_llong vmax,vmin,val;
targ_llong *p;
list_t bl;
int flags;
elem *e;
tym_t tys;
int sz;
unsigned char dword;
unsigned char mswsame;
#if LONGLONG
targ_ulong msw;
#else
unsigned msw;
#endif
e = b->Belem;
elem_debug(e);
cc = docommas(&e);
cgstate.stackclean++;
tys = tybasic(e->Ety);
sz = tysize[tys];
dword = (sz == 2 * REGSIZE);
mswsame = 1; // assume all msw's are the same
p = b->BS.Bswitch; /* pointer to case data */
assert(p);
ncases = *p++; /* number of cases */
vmax = MINLL; // smallest possible llong
vmin = MAXLL; // largest possible llong
for (n = 0; n < ncases; n++) // find max and min case values
{ val = *p++;
if (val > vmax) vmax = val;
if (val < vmin) vmin = val;
if (REGSIZE == 2)
{
unsigned short ms = (val >> 16) & 0xFFFF;
if (n == 0)
msw = ms;
else if (msw != ms)
mswsame = 0;
}
else // REGSIZE == 4
{
targ_ulong ms = (val >> 32) & 0xFFFFFFFF;
if (n == 0)
msw = ms;
else if (msw != ms)
mswsame = 0;
}
}
p -= ncases;
//dbg_printf("vmax = x%lx, vmin = x%lx, vmax-vmin = x%lx\n",vmax,vmin,vmax - vmin);
flags = (config.flags & CFGromable) ? CFcs : 0; // table is in code seg
if (I64)
{ // For now, just generate basic if-then sequence to get us running
retregs = ALLREGS;
b->BC = BCifthen;
c = scodelem(e,&retregs,0,TRUE);
assert(!dword); // 128 bit switches not supported
reg = findreg(retregs); // reg that result is in
bl = b->Bsucc;
for (n = 0; n < ncases; n++)
{ code *cx;
val = *p;
if (sz == 4)
cx = genc2(CNIL,0x81,modregrmx(3,7,reg),val); // CMP reg,val
else if (sz == 8)
{
if (val == (int)val) // if val is a 64 bit value sign-extended from 32 bits
{
cx = genc2(CNIL,0x81,modregrmx(3,7,reg),val); // CMP reg,value32
cx->Irex |= REX_W; // 64 bit operand
}
else
{ unsigned sreg;
// MOV sreg,value64
cx = regwithvalue(CNIL, ALLREGS & ~mask[reg], val, &sreg, 64);
cx = genregs(cx,0x3B,reg,sreg); // CMP reg,sreg
code_orrex(cx, REX_W);
}
}
else
assert(0);
bl = list_next(bl);
genjmp(cx,JE,FLblock,list_block(bl)); // JE caseaddr
c = cat(c,cx);
p++;
}
if (list_block(b->Bsucc) != b->Bnext) /* if default is not next block */
c = cat(c,genjmp(CNIL,JMP,FLblock,list_block(b->Bsucc)));
ce = NULL;
}
// Need to do research on MACHOBJ to see about better methods
else if (MACHOBJ || ncases <= 3)
{ // generate if-then sequence
retregs = ALLREGS;
L1:
b->BC = BCifthen;
c = scodelem(e,&retregs,0,TRUE);
if (dword)
{ reg = findreglsw(retregs);
reg2 = findregmsw(retregs);
}
else
reg = findreg(retregs); /* reg that result is in */
bl = b->Bsucc;
if (dword && mswsame)
{ /* CMP reg2,MSW */
c = genc2(c,0x81,modregrm(3,7,reg2),msw);
genjmp(c,JNE,FLblock,list_block(b->Bsucc)); /* JNE default */
}
for (n = 0; n < ncases; n++)
{ code *cnext = CNIL;
/* CMP reg,casevalue */
c = cat(c,ce = genc2(CNIL,0x81,modregrm(3,7,reg),(targ_int)*p));
if (dword && !mswsame)
{
cnext = gennop(CNIL);
genjmp(ce,JNE,FLcode,(block *) cnext);
genc2(ce,0x81,modregrm(3,7,reg2),MSREG(*p));
}
bl = list_next(bl);
/* JE caseaddr */
genjmp(ce,JE,FLblock,list_block(bl));
c = cat(c,cnext);
p++;
}
if (list_block(b->Bsucc) != b->Bnext) /* if default is not next block */
c = cat(c,genjmp(CNIL,JMP,FLblock,list_block(b->Bsucc)));
ce = NULL;
}
#if TARGET_WINDOS // try and find relocation to support this
else if ((targ_ullong)(vmax - vmin) <= ncases * 2) // then use jump table
{ int modify;
b->BC = BCjmptab;
retregs = IDXREGS;
if (dword)
retregs |= mMSW;
modify = (vmin || !I32);
c = scodelem(e,&retregs,0,!modify);
reg = findreg(retregs & IDXREGS); /* reg that result is in */
if (dword)
reg2 = findregmsw(retregs);
if (modify)
{
assert(!(retregs & regcon.mvar));
c = cat(c,getregs(retregs));
}
if (vmin) /* if there is a minimum */
{
c = genc2(c,0x81,modregrm(3,5,reg),vmin); /* SUB reg,vmin */
if (dword)
{ genc2(c,0x81,modregrm(3,3,reg2),MSREG(vmin)); // SBB reg2,vmin
genjmp(c,JNE,FLblock,list_block(b->Bsucc)); /* JNE default */
}
}
else if (dword)
{ c = gentstreg(c,reg2); // TEST reg2,reg2
genjmp(c,JNE,FLblock,list_block(b->Bsucc)); /* JNE default */
}
if (vmax - vmin != REGMASK) /* if there is a maximum */
{ /* CMP reg,vmax-vmin */
c = genc2(c,0x81,modregrm(3,7,reg),vmax-vmin);
genjmp(c,JA,FLblock,list_block(b->Bsucc)); /* JA default */
}
if (!I32)
c = gen2(c,0xD1,modregrm(3,4,reg)); /* SHL reg,1 */
if (I32)
{
ce = genc1(CNIL,0xFF,modregrm(0,4,4),FLswitch,0); /* JMP [CS:]disp[idxreg*4] */
ce->Isib = modregrm(2,reg,5);
}
else
{ rm = getaddrmode(retregs) | modregrm(0,4,0);
ce = genc1(CNIL,0xFF,rm,FLswitch,0); /* JMP [CS:]disp[idxreg] */
}
ce->Iflags |= flags; // segment override
ce->IEV1.Vswitch = b;
b->Btablesize = (int) (vmax - vmin + 1) * tysize[TYnptr];
}
#endif
else /* else use switch table (BCswitch) */
{ targ_size_t disp;
int mod;
code *esw;
code *ct;
retregs = mAX; /* SCASW requires AX */
if (dword)
retregs |= mDX;
else if (ncases <= 6 || config.flags4 & CFG4speed)
goto L1;
c = scodelem(e,&retregs,0,TRUE);
if (dword && mswsame)
{ /* CMP DX,MSW */
c = genc2(c,0x81,modregrm(3,7,DX),msw);
genjmp(c,JNE,FLblock,list_block(b->Bsucc)); /* JNE default */
}
ce = getregs(mCX|mDI);
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
if (config.flags3 & CFG3pic)
{ // Add in GOT
code *cx;
code *cgot;
ce = cat(ce, getregs(mDX));
cx = genc2(NULL,CALL,0,0); // CALL L1
gen1(cx, 0x58 + DI); // L1: POP EDI
// ADD EDI,_GLOBAL_OFFSET_TABLE_+3
symbol *gotsym = elfobj_getGOTsym();
cgot = gencs(CNIL,0x81,modregrm(3,0,DI),FLextern,gotsym);
cgot->Iflags = CFoff;
cgot->IEVoffset2 = 3;
makeitextern(gotsym);
genmovreg(cgot, DX, DI); // MOV EDX, EDI
// ADD EDI,offset of switch table
esw = gencs(CNIL,0x81,modregrm(3,0,DI),FLswitch,NULL);
esw->IEV2.Vswitch = b;
esw = cat3(cx, cgot, esw);
}
else
#endif
{
// MOV DI,offset of switch table
esw = gencs(CNIL,0xC7,modregrm(3,0,DI),FLswitch,NULL);
esw->IEV2.Vswitch = b;
}
ce = cat(ce,esw);
movregconst(ce,CX,ncases,0); /* MOV CX,ncases */
/* The switch table will be accessed through ES:DI.
* Therefore, load ES with proper segment value.
*/
if (config.flags3 & CFG3eseqds)
{ assert(!(config.flags & CFGromable));
ce = cat(ce,getregs(mCX)); // allocate CX
}
else
{
ce = cat(ce,getregs(mES|mCX)); // allocate ES and CX
gen1(ce,(config.flags & CFGromable) ? 0x0E : 0x1E); // PUSH CS/DS
gen1(ce,0x07); // POP ES
}
disp = (ncases - 1) * intsize; /* displacement to jump table */
if (dword && !mswsame)
{ code *cloop;
/* Build the following:
L1: SCASW
JNE L2
CMP DX,[CS:]disp[DI]
L2: LOOPNE L1
*/
mod = (disp > 127) ? 2 : 1; /* displacement size */
cloop = genc2(CNIL,0xE0,0,-7 - mod -
((config.flags & CFGromable) ? 1 : 0)); /* LOOPNE scasw */
ce = gen1(ce,0xAF); /* SCASW */
code_orflag(ce,CFtarg2); // target of jump
genjmp(ce,JNE,FLcode,(block *) cloop); /* JNE loop */
/* CMP DX,[CS:]disp[DI] */
ct = genc1(CNIL,0x39,modregrm(mod,DX,5),FLconst,disp);
ct->Iflags |= flags; // possible seg override
ce = cat3(ce,ct,cloop);
disp += ncases * intsize; /* skip over msw table */
}
else
{
ce = gen1(ce,0xF2); /* REPNE */
gen1(ce,0xAF); /* SCASW */
}
genjmp(ce,JNE,FLblock,list_block(b->Bsucc)); /* JNE default */
mod = (disp > 127) ? 2 : 1; /* 1 or 2 byte displacement */
if (config.flags & CFGromable)
gen1(ce,SEGCS); /* table is in code segment */
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
if (config.flags3 & CFG3pic)
{ // ADD EDX,(ncases-1)*2[EDI]
ct = genc1(CNIL,0x03,modregrm(mod,DX,7),FLconst,disp);
// JMP EDX
gen2(ct,0xFF,modregrm(3,4,DX));
}
else
#endif
{ // JMP (ncases-1)*2[DI]
ct = genc1(CNIL,0xFF,modregrm(mod,4,(I32 ? 7 : 5)),FLconst,disp);
ct->Iflags |= flags;
}
ce = cat(ce,ct);
b->Btablesize = disp + intsize + ncases * tysize[TYnptr];
}
b->Bcode = cat3(cc,c,ce);
//assert(b->Bcode);
cgstate.stackclean--;
}
/******************************
* Output data block for a jump table (BCjmptab).
* The 'holes' in the table get filled with the
* default label.
*/
void outjmptab(block *b)
{
unsigned ncases,n;
targ_llong u,vmin,vmax,val,*p;
targ_size_t alignbytes,def,targ,*poffset;
int jmpseg;
poffset = (config.flags & CFGromable) ? &Coffset : &JMPOFF;
p = b->BS.Bswitch; /* pointer to case data */
ncases = *p++; /* number of cases */
vmax = MINLL; // smallest possible llong
vmin = MAXLL; // largest possible llong
for (n = 0; n < ncases; n++) /* find min case value */
{ val = p[n];
if (val > vmax) vmax = val;
if (val < vmin) vmin = val;
}
jmpseg = (config.flags & CFGromable) ? cseg : JMPSEG;
/* Any alignment bytes necessary */
alignbytes = align(0,*poffset) - *poffset;
obj_lidata(jmpseg,*poffset,alignbytes);
#if OMFOBJ
*poffset += alignbytes;
#endif
def = list_block(b->Bsucc)->Boffset; /* default address */
assert(vmin <= vmax);
for (u = vmin; ; u++)
{ targ = def; /* default */
for (n = 0; n < ncases; n++)
{ if (p[n] == u)
{ targ = list_block(list_nth(b->Bsucc,n + 1))->Boffset;
break;
}
}
reftocodseg(jmpseg,*poffset,targ);
*poffset += tysize[TYnptr];
if (u == vmax) /* for case that (vmax == ~0) */
break;
}
}
/******************************
* Output data block for a switch table.
* Two consecutive tables, the first is the case value table, the
* second is the address table.
*/
void outswitab(block *b)
{ unsigned ncases,n;
targ_llong *p;
targ_size_t val;
targ_size_t alignbytes,*poffset;
int seg; /* target segment for table */
list_t bl;
unsigned sz;
targ_size_t offset;
//printf("outswitab()\n");
p = b->BS.Bswitch; /* pointer to case data */
ncases = *p++; /* number of cases */
if (config.flags & CFGromable)
{ poffset = &Coffset;
seg = cseg;
}
else
{
poffset = &JMPOFF;
seg = JMPSEG;
}
offset = *poffset;
alignbytes = align(0,*poffset) - *poffset;
//printf("\t*poffset = x%x, alignbytes = %d, intsize = %d\n", *poffset, alignbytes, intsize);
obj_lidata(seg,*poffset,alignbytes); /* any alignment bytes necessary */
#if OMFOBJ
*poffset += alignbytes;
#endif
assert(*poffset == offset + alignbytes);
sz = intsize;
for (n = 0; n < ncases; n++) /* send out value table */
{
//printf("\tcase %d, offset = x%x\n", n, *poffset);
#if OMFOBJ
*poffset +=
#endif
obj_bytes(seg,*poffset,sz,p);
p++;
}
offset += alignbytes + sz * ncases;
assert(*poffset == offset);
if (b->Btablesize == ncases * (REGSIZE * 2 + tysize[TYnptr]))
{
/* Send out MSW table */
p -= ncases;
for (n = 0; n < ncases; n++)
{ val = MSREG(*p);
p++;
#if OMFOBJ
*poffset +=
#endif
obj_bytes(seg,*poffset,REGSIZE,&val);
}
offset += REGSIZE * ncases;
assert(*poffset == offset);
}
bl = b->Bsucc;
for (n = 0; n < ncases; n++) /* send out address table */
{ bl = list_next(bl);
reftocodseg(seg,*poffset,list_block(bl)->Boffset);
*poffset += tysize[TYnptr];
}
assert(*poffset == offset + ncases * tysize[TYnptr]);
}
/*****************************
* Return a jump opcode relevant to the elem for a JMP TRUE.
*/
int jmpopcode(elem *e)
{ tym_t tym;
int zero,i,jp,op;
static const char jops[][2][6] =
{ /* <= > < >= == != <=0 >0 <0 >=0 ==0 !=0 */
{ {JLE,JG ,JL ,JGE,JE ,JNE},{JLE,JG ,JS ,JNS,JE ,JNE} }, /* signed */
{ {JBE,JA ,JB ,JAE,JE ,JNE},{JE ,JNE,JB ,JAE,JE ,JNE} }, /* unsigned */
#if 0
{ {JLE,JG ,JL ,JGE,JE ,JNE},{JLE,JG ,JL ,JGE,JE ,JNE} }, /* real */
{ {JBE,JA ,JB ,JAE,JE ,JNE},{JBE,JA ,JB ,JAE,JE ,JNE} }, /* 8087 */
{ {JA ,JBE,JAE,JB ,JE ,JNE},{JBE,JA ,JB ,JAE,JE ,JNE} }, /* 8087 R */
#endif
};
#define XP (JP << 8)
#define XNP (JNP << 8)
static const unsigned jfops[1][26] =
/* le gt lt ge eqeq ne unord lg leg ule ul uge */
{
{ XNP|JBE,JA,XNP|JB,JAE,XNP|JE, XP|JNE,JP, JNE,JNP, JBE,JC,XP|JAE,
/* ug ue ngt nge nlt nle ord nlg nleg nule nul nuge nug nue */
XP|JA,JE,JBE,JB, XP|JAE,XP|JA, JNP,JE, JP, JA, JNC,XNP|JB, XNP|JBE,JNE }, /* 8087 */
};
assert(e);
while (e->Eoper == OPcomma ||
/* The !EOP(e->E1) is to line up with the case in cdeq() where */
/* we decide if mPSW is passed on when evaluating E2 or not. */
(e->Eoper == OPeq && !EOP(e->E1)))
e = e->E2; /* right operand determines it */
op = e->Eoper;
if (e->Ecount != e->Ecomsub) // comsubs just get Z bit set
return JNE;
if (!OTrel(op)) // not relational operator
{
tym_t tymx = tybasic(e->Ety);
if (tyfloating(tymx) && config.inline8087 &&
(tymx == TYldouble || tymx == TYildouble || tymx == TYcldouble ||
tymx == TYcdouble || tymx == TYcfloat ||
op == OPind))
{
return XP|JNE;
}
return (op >= OPbt && op <= OPbts) ? JC : JNE;
}
if (e->E2->Eoper == OPconst)
zero = !boolres(e->E2);
else
zero = 0;
tym = e->E1->Ety;
if (tyfloating(tym))
#if 1
{ i = 0;
if (config.inline8087)
{ i = 1;
#if 1
#define NOSAHF I64
if (rel_exception(op) || config.flags4 & CFG4fastfloat)
{
if (zero)
{
if (NOSAHF)
op = swaprel(op);
}
else if (NOSAHF)
op = swaprel(op);
else if (cmporder87(e->E2))
op = swaprel(op);
else
;
}
else
{
if (zero && config.target_cpu < TARGET_80386)
;
else
op = swaprel(op);
}
#else
if (zero && !rel_exception(op) && config.target_cpu >= TARGET_80386)
op = swaprel(op);
else if (!zero &&
(cmporder87(e->E2) || !(rel_exception(op) || config.flags4 & CFG4fastfloat)))
/* compare is reversed */
op = swaprel(op);
#endif
}
jp = jfops[0][op - OPle];
goto L1;
}
#else
i = (config.inline8087) ? (3 + cmporder87(e->E2)) : 2;
#endif
else if (tyuns(tym) || tyuns(e->E2->Ety))
i = 1;
else if (tyintegral(tym) || typtr(tym))
i = 0;
else
{
#if DEBUG
elem_print(e);
WRTYxx(tym);
#endif
assert(0);
}
jp = jops[i][zero][op - OPle]; /* table starts with OPle */
L1:
#if DEBUG
if ((jp & 0xF0) != 0x70)
WROP(op),
printf("i %d zero %d op x%x jp x%x\n",i,zero,op,jp);
#endif
assert((jp & 0xF0) == 0x70);
return jp;
}
/**********************************
* Append code to *pc which validates pointer described by
* addressing mode in *pcs. Modify addressing mode in *pcs.
* Input:
* keepmsk mask of registers we must not destroy or use
* if (keepmsk & RMstore), this will be only a store operation
* into the lvalue
*/
void cod3_ptrchk(code **pc,code *pcs,regm_t keepmsk)
{ code *c;
code *cs2;
unsigned char rm,sib;
unsigned reg;
unsigned flagsave;
unsigned opsave;
regm_t idxregs;
regm_t tosave;
regm_t used;
int i;
assert(!I64);
if (!I16 && pcs->Iflags & (CFes | CFss | CFcs | CFds | CFfs | CFgs))
return; // not designed to deal with 48 bit far pointers
c = *pc;
rm = pcs->Irm;
assert(!(rm & 0x40)); // no disp8 or reg addressing modes
// If the addressing mode is already a register
reg = rm & 7;
if (I16)
{ static const unsigned char imode[8] = { BP,BP,BP,BP,SI,DI,BP,BX };
reg = imode[reg]; // convert [SI] to SI, etc.
}
idxregs = mask[reg];
if ((rm & 0x80 && (pcs->IFL1 != FLoffset || pcs->IEV1.Vuns)) ||
!(idxregs & ALLREGS)
)
{
// Load the offset into a register, so we can push the address
idxregs = (I16 ? IDXREGS : ALLREGS) & ~keepmsk; // only these can be index regs
assert(idxregs);
c = cat(c,allocreg(&idxregs,®,TYoffset));
opsave = pcs->Iop;
flagsave = pcs->Iflags;
pcs->Iop = 0x8D;
pcs->Irm |= modregrm(0,reg,0);
pcs->Iflags &= ~(CFopsize | CFss | CFes | CFcs); // no prefix bytes needed
c = gen(c,pcs); // LEA reg,EA
pcs->Iflags = flagsave;
pcs->Iop = opsave;
}
// registers destroyed by the function call
used = (mBP | ALLREGS | mES) & ~fregsaved;
used = 0; // much less code generated this way
cs2 = CNIL;
tosave = used & (keepmsk | idxregs);
for (i = 0; tosave; i++)
{ regm_t mi = mask[i];
assert(i < REGMAX);
if (mi & tosave) /* i = register to save */
{
int push,pop;
stackchanged = 1;
if (i == ES)
{ push = 0x06;
pop = 0x07;
}
else
{ push = 0x50 + i;
pop = push | 8;
}
c = gen1(c,push); // PUSH i
cs2 = cat(gen1(CNIL,pop),cs2); // POP i
tosave &= ~mi;
}
}
// For 16 bit models, push a far pointer
if (I16)
{ int segreg;
switch (pcs->Iflags & (CFes | CFss | CFcs | CFds | CFfs | CFgs))
{ case CFes: segreg = 0x06; break;
case CFss: segreg = 0x16; break;
case CFcs: segreg = 0x0E; break;
case 0: segreg = 0x1E; break; // DS
default:
assert(0);
}