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cod2.c
4995 lines (4578 loc) · 159 KB
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cod2.c
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// Copyright (C) 1984-1998 by Symantec
// Copyright (C) 2000-2011 by Digital Mars
// All Rights Reserved
// http://www.digitalmars.com
// Written by Walter Bright
/*
* This source file is made available for personal use
* only. The license is in /dmd/src/dmd/backendlicense.txt
* or /dm/src/dmd/backendlicense.txt
* For any other uses, please contact Digital Mars.
*/
#if !SPP
#include <stdio.h>
#include <string.h>
#include <time.h>
#include "cc.h"
#include "oper.h"
#include "el.h"
#include "code.h"
#include "global.h"
#include "type.h"
#if SCPP
#include "exh.h"
#endif
static char __file__[] = __FILE__; /* for tassert.h */
#include "tassert.h"
int cdcmp_flag;
extern signed char regtorm[8];
/*******************************************
* !=0 if cannot use this EA in anything other than a MOV instruction.
*/
int movOnly(elem *e)
{
#if TARGET_OSX
if (I64 && config.flags3 & CFG3pic && e->Eoper == OPvar)
{ symbol *s = e->EV.sp.Vsym;
// Fixups for these can only be done with a MOV
if (s->Sclass == SCglobal || s->Sclass == SCextern ||
s->Sclass == SCcomdat || s->Sclass == SCcomdef)
return 1;
}
#endif
return 0;
}
/********************************
* Return mask of index registers used by addressing mode.
* Index is rm of modregrm field.
*/
regm_t idxregm(code *c)
{
static const unsigned char idxsib[8] = { mAX,mCX,mDX,mBX,0,mBP,mSI,mDI };
static const unsigned char idxrm[8] = {mBX|mSI,mBX|mDI,mSI,mDI,mSI,mDI,0,mBX};
unsigned rm = c->Irm;
regm_t idxm = 0;
if ((rm & 0xC0) != 0xC0) /* if register is not the destination */
{
if (I16)
idxm = idxrm[rm & 7];
else
{
if ((rm & 7) == 4) /* if sib byte */
{
unsigned sib = c->Isib;
unsigned idxreg = (sib >> 3) & 7;
if (c->Irex & REX_X)
{ idxreg |= 8;
idxm = mask[idxreg]; // scaled index reg
}
else
idxm = idxsib[idxreg]; // scaled index reg
if ((sib & 7) == 5 && (rm & 0xC0) == 0)
;
else
{ unsigned base = sib & 7;
if (c->Irex & REX_B)
idxm |= mask[base | 8];
else
idxm |= idxsib[base];
}
}
else
{ unsigned base = rm & 7;
if (c->Irex & REX_B)
idxm |= mask[base | 8];
else
idxm |= idxsib[base];
}
}
}
return idxm;
}
#if TARGET_WINDOS
/***************************
* Gen code for call to floating point routine.
*/
code *opdouble(elem *e,regm_t *pretregs,unsigned clib)
{
regm_t retregs1,retregs2;
code *cl, *cr, *c;
if (config.inline8087)
return orth87(e,pretregs);
if (tybasic(e->E1->Ety) == TYfloat)
{
clib += CLIBfadd - CLIBdadd; /* convert to float operation */
retregs1 = FLOATREGS;
retregs2 = FLOATREGS2;
}
else
{
if (I32)
{ retregs1 = DOUBLEREGS_32;
retregs2 = DOUBLEREGS2_32;
}
else
{ retregs1 = mSTACK;
retregs2 = DOUBLEREGS_16;
}
}
cl = codelem(e->E1, &retregs1,FALSE);
if (retregs1 & mSTACK)
cgstate.stackclean++;
cr = scodelem(e->E2, &retregs2, retregs1 & ~mSTACK, FALSE);
if (retregs1 & mSTACK)
cgstate.stackclean--;
c = callclib(e, clib, pretregs, 0);
return cat3(cl, cr, c);
}
#endif
/*****************************
* Handle operators which are more or less orthogonal
* ( + - & | ^ )
*/
code *cdorth(elem *e,regm_t *pretregs)
{ tym_t ty1;
regm_t retregs,rretregs,posregs;
unsigned reg,rreg,op1,op2,mode;
int rval;
code *c,*cg,*cl;
targ_size_t i;
elem *e1,*e2;
int numwords; /* # of words to be operated on */
static int nest;
//printf("cdorth(e = %p, *pretregs = %s)\n",e,regm_str(*pretregs));
e1 = e->E1;
e2 = e->E2;
if (*pretregs == 0) /* if don't want result */
{ c = codelem(e1,pretregs,FALSE); /* eval left leaf */
*pretregs = 0; /* in case they got set */
return cat(c,codelem(e2,pretregs,FALSE));
}
ty1 = tybasic(e1->Ety);
if (tyfloating(ty1))
{
if (*pretregs & XMMREGS || tyvector(ty1))
return orthxmm(e,pretregs);
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
return orth87(e,pretregs);
#else
return opdouble(e,pretregs,(e->Eoper == OPadd) ? CLIBdadd
: CLIBdsub);
#endif
}
if (tyxmmreg(ty1))
return orthxmm(e,pretregs);
tym_t ty2 = tybasic(e2->Ety);
int e2oper = e2->Eoper;
tym_t ty = tybasic(e->Ety);
unsigned sz = tysize[ty];
unsigned byte = (sz == 1);
unsigned char word = (!I16 && sz == SHORTSIZE) ? CFopsize : 0;
unsigned test = FALSE; // assume we destroyed lvalue
code cs;
cs.Iflags = 0;
cs.Irex = 0;
code *cr = CNIL;
switch (e->Eoper)
{ case OPadd: mode = 0;
op1 = 0x03; op2 = 0x13; break; /* ADD, ADC */
case OPmin: mode = 5;
op1 = 0x2B; op2 = 0x1B; break; /* SUB, SBB */
case OPor: mode = 1;
op1 = 0x0B; op2 = 0x0B; break; /* OR , OR */
case OPxor: mode = 6;
op1 = 0x33; op2 = 0x33; break; /* XOR, XOR */
case OPand: mode = 4;
op1 = 0x23; op2 = 0x23; /* AND, AND */
if (tyreg(ty1) &&
*pretregs == mPSW) /* if flags only */
{ test = TRUE;
op1 = 0x85; /* TEST */
mode = 0;
}
break;
default:
assert(0);
}
op1 ^= byte; /* if byte operation */
/* Compute number of words to operate on. */
numwords = 1;
if (!I16)
{ /* Cannot operate on longs and then do a 'paint' to a far */
/* pointer, because far pointers are 48 bits and longs are 32. */
/* Therefore, numwords can never be 2. */
assert(!(tyfv(ty1) && tyfv(ty2)));
if (sz == 2 * REGSIZE)
{
numwords++;
}
}
else
{ /* If ty is a TYfptr, but both operands are long, treat the */
/* operation as a long. */
#if TARGET_SEGMENTED
if ((tylong(ty1) || ty1 == TYhptr) &&
(tylong(ty2) || ty2 == TYhptr))
numwords++;
#else
if (tylong(ty1) && tylong(ty2))
numwords++;
#endif
}
// Special cases where only flags are set
if (test && tysize[ty1] <= REGSIZE &&
(e1->Eoper == OPvar || (e1->Eoper == OPind && !e1->Ecount))
#if TARGET_OSX
&& !movOnly(e1)
#endif
)
{
// Handle the case of (var & const)
if (e2->Eoper == OPconst && el_signx32(e2))
{
c = getlvalue(&cs,e1,0);
targ_size_t value = e2->EV.Vpointer;
if (sz == 2)
value &= 0xFFFF;
else if (sz == 4)
value &= 0xFFFFFFFF;
if (reghasvalue(byte ? BYTEREGS : ALLREGS,value,®))
goto L11;
if (sz == 8 && !I64)
{
assert(value == (int)value); // sign extend imm32
}
op1 = 0xF7;
cs.IEV2.Vint = value;
cs.IFL2 = FLconst;
goto L10;
}
// Handle (exp & reg)
if (isregvar(e2,&retregs,®))
{
c = getlvalue(&cs,e1,0);
L11:
code_newreg(&cs, reg);
if (I64 && byte && reg >= 4)
cs.Irex |= REX;
L10:
cs.Iop = op1 ^ byte;
cs.Iflags |= word | CFpsw;
freenode(e1);
freenode(e2);
return gen(c,&cs);
}
}
// Look for possible uses of LEA
if (e->Eoper == OPadd &&
!(*pretregs & mPSW) && /* flags aren't set by LEA */
!nest && // could cause infinite recursion if e->Ecount
(sz == REGSIZE || (I64 && sz == 4))) // far pointers aren't handled
{
unsigned rex = (sz == 8) ? REX_W : 0;
// Handle the case of (e + &var)
int e1oper = e1->Eoper;
if ((e2oper == OPrelconst && (config.target_cpu >= TARGET_Pentium || (!e2->Ecount && stackfl[el_fl(e2)])))
|| // LEA costs too much for simple EAs on older CPUs
(e2oper == OPconst && (e1->Eoper == OPcall || e1->Eoper == OPcallns) && !(*pretregs & mAX)) ||
(!I16 && (isscaledindex(e1) || isscaledindex(e2))) ||
(!I16 && e1oper == OPvar && e1->EV.sp.Vsym->Sfl == FLreg && (e2oper == OPconst || (e2oper == OPvar && e2->EV.sp.Vsym->Sfl == FLreg))) ||
(e2oper == OPconst && e1oper == OPeq && e1->E1->Eoper == OPvar) ||
(!I16 && (e2oper == OPrelconst || e2oper == OPconst) && !e1->Ecount &&
(e1oper == OPmul || e1oper == OPshl) &&
e1->E2->Eoper == OPconst &&
ssindex(e1oper,e1->E2->EV.Vuns)
) ||
(!I16 && e1->Ecount)
)
{
int inc = e->Ecount != 0;
nest += inc;
c = getlvalue(&cs,e,0);
nest -= inc;
unsigned reg;
c = cat(c,allocreg(pretregs,®,ty));
cs.Iop = 0x8D;
code_newreg(&cs, reg);
c = gen(c,&cs); // LEA reg,EA
if (rex)
code_orrex(c, rex);
return c;
}
// Handle the case of ((e + c) + e2)
if (!I16 &&
e1oper == OPadd &&
(e1->E2->Eoper == OPconst && el_signx32(e1->E2) ||
e2oper == OPconst && el_signx32(e2)) &&
!e1->Ecount
)
{ elem *e11;
elem *ebase;
elem *edisp;
int ss;
int ss2;
unsigned reg1,reg2;
code *c1,*c2,*c3;
if (e2oper == OPconst && el_signx32(e2))
{ edisp = e2;
ebase = e1->E2;
}
else
{ edisp = e1->E2;
ebase = e2;
}
e11 = e1->E1;
retregs = *pretregs & ALLREGS;
if (!retregs)
retregs = ALLREGS;
ss = 0;
ss2 = 0;
// Handle the case of (((e * c1) + c2) + e2)
// Handle the case of (((e << c1) + c2) + e2)
if ((e11->Eoper == OPmul || e11->Eoper == OPshl) &&
e11->E2->Eoper == OPconst &&
!e11->Ecount
)
{
targ_size_t co1 = el_tolong(e11->E2);
if (e11->Eoper == OPshl)
{
if (co1 > 3)
goto L13;
ss = co1;
}
else
{
ss2 = 1;
switch (co1)
{
case 6: ss = 1; break;
case 12: ss = 1; ss2 = 2; break;
case 24: ss = 1; ss2 = 3; break;
case 10: ss = 2; break;
case 20: ss = 2; ss2 = 2; break;
case 40: ss = 2; ss2 = 3; break;
case 18: ss = 3; break;
case 36: ss = 3; ss2 = 2; break;
case 72: ss = 3; ss2 = 3; break;
default:
ss2 = 0;
goto L13;
}
}
freenode(e11->E2);
freenode(e11);
e11 = e11->E1;
goto L13;
}
else
{
L13:
regm_t regm;
if (e11->Eoper == OPvar && isregvar(e11,®m,®1))
{
if (tysize[tybasic(e11->Ety)]<= REGSIZE)
retregs = mask[reg1]; // only want the LSW
else
retregs = regm;
c1 = NULL;
freenode(e11);
}
else
c1 = codelem(e11,&retregs,FALSE);
}
rretregs = ALLREGS & ~retregs;
c2 = scodelem(ebase,&rretregs,retregs,TRUE);
{
regm_t sregs = *pretregs & ~rretregs;
if (!sregs)
sregs = ALLREGS & ~rretregs;
c3 = allocreg(&sregs,®,ty);
}
assert((retregs & (retregs - 1)) == 0); // must be only one register
assert((rretregs & (rretregs - 1)) == 0); // must be only one register
reg1 = findreg(retregs);
reg2 = findreg(rretregs);
if (ss2)
{
assert(reg != reg2);
if ((reg1 & 7) == BP)
{ static unsigned imm32[4] = {1+1,2+1,4+1,8+1};
// IMUL reg,imm32
c = genc2(CNIL,0x69,modregxrmx(3,reg,reg1),imm32[ss]);
}
else
{ // LEA reg,[reg1*ss][reg1]
c = gen2sib(CNIL,0x8D,modregxrm(0,reg,4),modregrm(ss,reg1 & 7,reg1 & 7));
if (reg1 & 8)
code_orrex(c, REX_X | REX_B);
}
if (rex)
code_orrex(c, rex);
reg1 = reg;
ss = ss2; // use *2 for scale
}
else
c = NULL;
c = cat4(c1,c2,c3,c);
cs.Iop = 0x8D; // LEA reg,c[reg1*ss][reg2]
cs.Irm = modregrm(2,reg & 7,4);
cs.Isib = modregrm(ss,reg1 & 7,reg2 & 7);
assert(reg2 != BP);
cs.Iflags = CFoff;
cs.Irex = rex;
if (reg & 8)
cs.Irex |= REX_R;
if (reg1 & 8)
cs.Irex |= REX_X;
if (reg2 & 8)
cs.Irex |= REX_B;
cs.IFL1 = FLconst;
cs.IEV1.Vsize_t = edisp->EV.Vuns;
freenode(edisp);
freenode(e1);
c = gen(c,&cs);
return cat(c,fixresult(e,mask[reg],pretregs));
}
}
posregs = (byte) ? BYTEREGS : (mES | ALLREGS | mBP);
retregs = *pretregs & posregs;
if (retregs == 0) /* if no return regs speced */
/* (like if wanted flags only) */
retregs = ALLREGS & posregs; // give us some
if (tysize[ty1] > REGSIZE && numwords == 1)
{ /* The only possibilities are (TYfptr + tyword) or (TYfptr - tyword) */
#if DEBUG
if (tysize[ty2] != REGSIZE)
{ printf("e = %p, e->Eoper = ",e);
WROP(e->Eoper);
printf(" e1->Ety = ");
WRTYxx(ty1);
printf(" e2->Ety = ");
WRTYxx(ty2);
printf("\n");
elem_print(e);
}
#endif
assert(tysize[ty2] == REGSIZE);
#if TARGET_SEGMENTED
/* Watch out for the case here where you are going to OP reg,EA */
/* and both the reg and EA use ES! Prevent this by forcing */
/* reg into the regular registers. */
if ((e2oper == OPind ||
(e2oper == OPvar && el_fl(e2) == FLfardata)) &&
!e2->Ecount)
{
retregs = ALLREGS;
}
#endif
cl = codelem(e1,&retregs,test);
reg = findreglsw(retregs); /* reg is the register with the offset*/
}
#if TARGET_SEGMENTED
else if (ty1 == TYhptr || ty2 == TYhptr)
{ /* Generate code for add/subtract of huge pointers.
No attempt is made to generate very good code.
*/
unsigned mreg,lreg;
unsigned lrreg;
retregs = (retregs & mLSW) | mDX;
if (ty1 == TYhptr)
{ // hptr +- long
rretregs = mLSW & ~(retregs | regcon.mvar);
if (!rretregs)
rretregs = mLSW;
rretregs |= mCX;
cl = codelem(e1,&rretregs,0);
retregs &= ~rretregs;
if (!(retregs & mLSW))
retregs |= mLSW & ~rretregs;
cr = scodelem(e2,&retregs,rretregs,TRUE);
}
else
{ // long + hptr
cl = codelem(e1,&retregs,0);
rretregs = (mLSW | mCX) & ~retregs;
if (!(rretregs & mLSW))
rretregs |= mLSW;
cr = scodelem(e2,&rretregs,retregs,TRUE);
}
cg = getregs(rretregs | retregs);
mreg = DX;
lreg = findreglsw(retregs);
c = CNIL;
if (e->Eoper == OPmin)
{ // negate retregs
c = gen2(c,0xF7,modregrm(3,3,mreg)); // NEG mreg
gen2(c,0xF7,modregrm(3,3,lreg)); // NEG lreg
code_orflag(c,CFpsw);
genc2(c,0x81,modregrm(3,3,mreg),0); // SBB mreg,0
}
lrreg = findreglsw(rretregs);
c = genregs(c,0x03,lreg,lrreg); // ADD lreg,lrreg
code_orflag(c,CFpsw);
genmovreg(c,lrreg,CX); // MOV lrreg,CX
genc2(c,0x81,modregrm(3,2,mreg),0); // ADC mreg,0
genshift(c); // MOV CX,offset __AHSHIFT
gen2(c,0xD3,modregrm(3,4,mreg)); // SHL mreg,CL
genregs(c,0x03,mreg,lrreg); // ADD mreg,MSREG(h)
goto L5;
}
#endif
else
{ regm_t regm;
/* if (tyword + TYfptr) */
if (tysize[ty1] == REGSIZE && tysize[ty2] > REGSIZE)
{ retregs = ~*pretregs & ALLREGS;
/* if retregs doesn't have any regs in it that aren't reg vars */
if ((retregs & ~regcon.mvar) == 0)
retregs |= mAX;
}
else if (numwords == 2 && retregs & mES)
retregs = (retregs | mMSW) & ALLREGS;
// Determine if we should swap operands, because
// mov EAX,x
// add EAX,reg
// is faster than:
// mov EAX,reg
// add EAX,x
else if (e2oper == OPvar &&
e1->Eoper == OPvar &&
e->Eoper != OPmin &&
isregvar(e1,®m,NULL) &&
regm != retregs &&
tysize[ty1] == tysize[ty2])
{
elem *es = e1;
e1 = e2;
e2 = es;
}
cl = codelem(e1,&retregs,test); /* eval left leaf */
reg = findreg(retregs);
}
switch (e2oper)
{
case OPind: /* if addressing mode */
if (!e2->Ecount) /* if not CSE */
goto L1; /* try OP reg,EA */
/* FALL-THROUGH */
default: /* operator node */
L2:
rretregs = ALLREGS & ~retregs;
/* Be careful not to do arithmetic on ES */
if (tysize[ty1] == REGSIZE && tysize[ty2] > REGSIZE && *pretregs != mPSW)
rretregs = *pretregs & (mES | ALLREGS | mBP) & ~retregs;
else if (byte)
rretregs &= BYTEREGS;
cr = scodelem(e2,&rretregs,retregs,TRUE); /* get rvalue */
rreg = (tysize[ty2] > REGSIZE) ? findreglsw(rretregs) : findreg(rretregs);
c = CNIL;
if (numwords == 1) /* ADD reg,rreg */
{
/* reverse operands to avoid moving around the segment value */
if (tysize[ty2] > REGSIZE)
{ c = cat(c,getregs(rretregs));
c = genregs(c,op1,rreg,reg);
retregs = rretregs; /* reverse operands */
}
else
{ c = genregs(c,op1,reg,rreg);
if (!I16 && *pretregs & mPSW)
c->Iflags |= word;
}
if (I64 && sz == 8)
code_orrex(c, REX_W);
if (I64 && byte && (reg >= 4 || rreg >= 4))
code_orrex(c, REX);
}
else /* numwords == 2 */ /* ADD lsreg,lsrreg */
{
reg = findreglsw(retregs);
rreg = findreglsw(rretregs);
c = genregs(c,op1,reg,rreg);
if (e->Eoper == OPadd || e->Eoper == OPmin)
code_orflag(c,CFpsw);
reg = findregmsw(retregs);
rreg = findregmsw(rretregs);
if (!(e2oper == OPu16_32 && // if second operand is 0
(op2 == 0x0B || op2 == 0x33)) // and OR or XOR
)
genregs(c,op2,reg,rreg); // ADC msreg,msrreg
}
break;
case OPrelconst:
if (sz != REGSIZE)
goto L2;
if (segfl[el_fl(e2)] != 3) /* if not in data segment */
goto L2;
if (evalinregister(e2))
goto L2;
cs.IEVoffset2 = e2->EV.sp.Voffset;
cs.IEVsym2 = e2->EV.sp.Vsym;
cs.Iflags |= CFoff;
i = 0; /* no INC or DEC opcode */
rval = 0;
goto L3;
case OPconst:
if (tyfv(ty2))
goto L2;
if (numwords == 1)
{
if (!el_signx32(e2))
goto L2;
i = e2->EV.Vpointer;
if (word)
{
if (!(*pretregs & mPSW) &&
config.flags4 & CFG4speed &&
(e->Eoper == OPor || e->Eoper == OPxor || test ||
(e1->Eoper != OPvar && e1->Eoper != OPind)))
{ word = 0;
i &= 0xFFFF;
}
}
rval = reghasvalue(byte ? BYTEREGS : ALLREGS,i,&rreg);
cs.IEV2.Vint = i;
L3:
op1 ^= byte;
cs.Iflags |= word;
if (rval)
{ cs.Iop = op1 ^ 2;
mode = rreg;
}
else
cs.Iop = 0x81;
cs.Irm = modregrm(3,mode&7,reg&7);
if (mode & 8)
cs.Irex |= REX_R;
if (reg & 8)
cs.Irex |= REX_B;
if (I64 && sz == 8)
cs.Irex |= REX_W;
if (I64 && byte && (reg >= 4 || (rval && rreg >= 4)))
cs.Irex |= REX;
cs.IFL2 = (e2->Eoper == OPconst) ? FLconst : el_fl(e2);
/* Modify instruction for special cases */
switch (e->Eoper)
{ case OPadd:
{ int iop;
if (i == 1)
iop = 0; /* INC reg */
else if (i == -1)
iop = 8; /* DEC reg */
else
break;
cs.Iop = (0x40 | iop | reg) ^ byte;
if ((byte && *pretregs & mPSW) || I64)
{ cs.Irm = modregrm(3,0,reg & 7) | iop;
cs.Iop = 0xFF;
}
break;
}
case OPand:
if (test)
cs.Iop = rval ? op1 : 0xF7; // TEST
break;
}
if (*pretregs & mPSW)
cs.Iflags |= CFpsw;
cs.Iop ^= byte;
c = gen(CNIL,&cs);
cs.Iflags &= ~CFpsw;
}
else if (numwords == 2)
{ unsigned lsreg;
targ_int msw;
c = getregs(retregs);
reg = findregmsw(retregs);
lsreg = findreglsw(retregs);
cs.Iop = 0x81;
cs.Irm = modregrm(3,mode,lsreg);
cs.IFL2 = FLconst;
msw = MSREG(e2->EV.Vllong);
cs.IEV2.Vint = e2->EV.Vlong;
switch (e->Eoper)
{ case OPadd:
case OPmin:
cs.Iflags |= CFpsw;
break;
}
c = gen(c,&cs);
cs.Iflags &= ~CFpsw;
cs.Irm = (cs.Irm & modregrm(3,7,0)) | reg;
cs.IEV2.Vint = msw;
if (e->Eoper == OPadd)
cs.Irm |= modregrm(0,2,0); /* ADC */
c = gen(c,&cs);
}
else
assert(0);
freenode(e2);
break;
case OPvar:
#if TARGET_OSX
if (movOnly(e2))
goto L2;
#endif
L1:
if (tyfv(ty2))
goto L2;
c = loadea(e2,&cs,op1,
((numwords == 2) ? findreglsw(retregs) : reg),
0,retregs,retregs);
if (!I16 && word)
{ if (*pretregs & mPSW)
code_orflag(c,word);
else
{
code *ce = code_last(c);
ce->Iflags &= ~word;
}
}
else if (numwords == 2)
{
if (e->Eoper == OPadd || e->Eoper == OPmin)
code_orflag(c,CFpsw);
reg = findregmsw(retregs);
if (EOP(e2))
{ getlvalue_msw(&cs);
cs.Iop = op2;
NEWREG(cs.Irm,reg);
c = gen(c,&cs); /* ADC reg,data+2 */
}
else
c = cat(c,loadea(e2,&cs,op2,reg,REGSIZE,retregs,0));
}
else if (I64 && sz == 8)
code_orrex(c, REX_W);
freenode(e2);
break;
}
if (sz <= REGSIZE && *pretregs & mPSW)
{
/* If the expression is (_tls_array + ...), then the flags are not set
* since the linker may rewrite these instructions into something else.
*/
if (I64 && e->Eoper == OPadd && e1->Eoper == OPvar)
{
symbol *s = e1->EV.sp.Vsym;
if (s->Sident[0] == '_' && memcmp(s->Sident + 1,"tls_array",10) == 0)
{
goto L7; // don't assume flags are set
}
}
code_orflag(c,CFpsw);
*pretregs &= ~mPSW; /* flags already set */
L7: ;
}
if (test)
cg = NULL; /* didn't destroy any */
else
cg = getregs(retregs); /* we will trash these regs */
L5:
c = cat(c,fixresult(e,retregs,pretregs));
return cat4(cl,cr,cg,c);
}
/*****************************
* Handle multiply, divide, modulo and remquo.
* Note that modulo isn't defined for doubles.
*/
code *cdmul(elem *e,regm_t *pretregs)
{ unsigned rreg,op,oper,lib,byte;
regm_t resreg,retregs,rretregs;
regm_t keepregs;
tym_t uns; // 1 if unsigned operation, 0 if not
tym_t tyml;
code *c,*cg,*cl,*cr,cs;
elem *e1,*e2;
int sz;
targ_size_t e2factor;
int opunslng;
int pow2;
if (*pretregs == 0) // if don't want result
{ c = codelem(e->E1,pretregs,FALSE); // eval left leaf
*pretregs = 0; // in case they got set
return cat(c,codelem(e->E2,pretregs,FALSE));
}
//printf("cdmul(e = %p, *pretregs = %s)\n", e, regm_str(*pretregs));
keepregs = 0;
cs.Iflags = 0;
cs.Irex = 0;
c = cg = cr = CNIL; // initialize
e2 = e->E2;
e1 = e->E1;
tyml = tybasic(e1->Ety);
sz = tysize[tyml];
byte = tybyte(e->Ety) != 0;
uns = tyuns(tyml) || tyuns(e2->Ety);
oper = e->Eoper;
unsigned rex = (I64 && sz == 8) ? REX_W : 0;
unsigned grex = rex << 16;
if (tyfloating(tyml))
{
if (*pretregs & XMMREGS && oper != OPmod)
return orthxmm(e,pretregs);
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
return orth87(e,pretregs);
#else
return opdouble(e,pretregs,(oper == OPmul) ? CLIBdmul : CLIBddiv);
#endif
}
if (tyxmmreg(tyml))
return orthxmm(e,pretregs);
opunslng = I16 ? OPu16_32 : OPu32_64;
switch (oper)
{
case OPmul:
resreg = mAX;
op = 5 - uns;
lib = CLIBlmul;
break;
case OPdiv:
resreg = mAX;
op = 7 - uns;
lib = uns ? CLIBuldiv : CLIBldiv;
if (I32)
keepregs |= mSI | mDI;
break;
case OPmod:
resreg = mDX;
op = 7 - uns;
lib = uns ? CLIBulmod : CLIBlmod;
if (I32)
keepregs |= mSI | mDI;
break;
case OPremquo:
resreg = mDX | mAX;
op = 7 - uns;
lib = uns ? CLIBuldiv : CLIBldiv;
if (I32)
keepregs |= mSI | mDI;
break;
default:
assert(0);
}
if (sz <= REGSIZE) // dedicated regs for mul & div
{ retregs = mAX;
/* pick some other regs */
rretregs = byte ? BYTEREGS & ~mAX
: ALLREGS & ~(mAX|mDX);
}
else
{
assert(sz <= 2 * REGSIZE);
retregs = mDX | mAX;
rretregs = mCX | mBX; // second arg
}
switch (e2->Eoper)
{
case OPu16_32:
case OPs16_32:
case OPu32_64:
case OPs32_64:
if (sz != 2 * REGSIZE || oper != OPmul || e1->Eoper != e2->Eoper ||
e1->Ecount || e2->Ecount)
goto L2;
op = (e2->Eoper == opunslng) ? 4 : 5;
retregs = mAX;
cl = codelem(e1->E1,&retregs,FALSE); /* eval left leaf */
if (e2->E1->Eoper == OPvar ||
(e2->E1->Eoper == OPind && !e2->E1->Ecount)
)
{
cr = loadea(e2->E1,&cs,0xF7,op,0,mAX,mAX | mDX);
}
else
{
rretregs = ALLREGS & ~mAX;
cr = scodelem(e2->E1,&rretregs,retregs,TRUE); // get rvalue
cg = getregs(mAX | mDX);
rreg = findreg(rretregs);
cg = gen2(cg,0xF7,grex | modregrmx(3,op,rreg)); // OP AX,rreg
}
freenode(e->E1);
freenode(e2);
c = fixresult(e,mAX | mDX,pretregs);
break;
case OPconst:
e2factor = el_tolong(e2);
if (oper == OPmul && I32 && sz == REGSIZE * 2)
{ targ_int msw,lsw;
regm_t scratch;
unsigned reg;
targ_llong e2factor;
cl = codelem(e1,&retregs,FALSE); // eval left leaf
/* IMUL EDX,EDX,lsw
IMUL reg,EAX,msw
ADD reg,EDX
MOV EDX,lsw
MUL EDX
ADD EDX,reg
if (msw == 0)
IMUL reg,EDX,lsw
MOV EDX,lsw
MUL EDX
ADD EDX,reg
*/
scratch = allregs & ~(mAX | mDX);
cr = allocreg(&scratch,®,TYint);
cg = getregs(mDX | mAX);
e2factor = el_tolong(e2);
lsw = e2factor & ((1LL << (REGSIZE * 8)) - 1);
msw = e2factor >> (REGSIZE * 8);
if (msw)
{ cg = genmulimm(cg,DX,DX,lsw);
cg = genmulimm(cg,reg,AX,msw);
cg = gen2(cg,0x03,modregrm(3,reg,DX));
}
else
cg = genmulimm(cg,reg,DX,lsw);