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cod3.c
6339 lines (5845 loc) · 204 KB
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cod3.c
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// Copyright (C) 1984-1998 by Symantec
// Copyright (C) 2000-2011 by Digital Mars
// All Rights Reserved
// http://www.digitalmars.com
// Written by Walter Bright
/*
* This source file is made available for personal use
* only. The license is in /dmd/src/dmd/backendlicense.txt
* or /dm/src/dmd/backendlicense.txt
* For any other uses, please contact Digital Mars.
*/
#if !SPP
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include "cc.h"
#include "el.h"
#include "code.h"
#include "oper.h"
#include "global.h"
#include "type.h"
#include "tinfo.h"
#if SCPP
#include "exh.h"
#endif
#if HYDRATE
#include "parser.h"
#endif
static char __file__[] = __FILE__; /* for tassert.h */
#include "tassert.h"
extern targ_size_t retsize;
STATIC void pinholeopt_unittest();
STATIC void do8bit (enum FL,union evc *);
STATIC void do16bit (enum FL,union evc *,int);
STATIC void do32bit (enum FL,union evc *,int,targ_size_t = 0);
STATIC void do64bit (enum FL,union evc *,int);
static int hasframe; /* !=0 if this function has a stack frame */
static targ_size_t Foff; // BP offset of floating register
static targ_size_t CSoff; // offset of common sub expressions
static targ_size_t NDPoff; // offset of saved 8087 registers
int BPoff; // offset from BP
static int EBPtoESP; // add to EBP offset to get ESP offset
static int AAoff; // offset of alloca temporary
#if ELFOBJ || MACHOBJ
#define JMPSEG CDATA
#define JMPOFF CDoffset
#else
#define JMPSEG DATA
#define JMPOFF Doffset
#endif
/*************
* Size in bytes of each instruction.
* 0 means illegal instruction.
* bit M: if there is a modregrm field (EV1 is reserved for modregrm)
* bit T: if there is a second operand (EV2)
* bit E: if second operand is only 8 bits
* bit A: a short version exists for the AX reg
* bit R: a short version exists for regs
* bits 2..0: size of instruction (excluding optional bytes)
*/
#define M 0x80
#define T 0x40
#define E 0x20
#define A 0x10
#define R 0x08
#define W 0
static unsigned char inssize[256] =
{ M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 00 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 08 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 10 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 18 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 20 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 28 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 30 */
M|2,M|2,M|2,M|2, T|E|2,T|3,1,1, /* 38 */
1,1,1,1, 1,1,1,1, /* 40 */
1,1,1,1, 1,1,1,1, /* 48 */
1,1,1,1, 1,1,1,1, /* 50 */
1,1,1,1, 1,1,1,1, /* 58 */
1,1,M|2,M|2, 1,1,1,1, /* 60 */
T|3,M|T|4,T|E|2,M|T|E|3, 1,1,1,1, /* 68 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* 70 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* 78 */
M|T|E|A|3,M|T|A|4,M|T|E|3,M|T|E|3, M|2,M|2,M|2,M|A|R|2, /* 80 */
M|A|2,M|A|2,M|A|2,M|A|2, M|2,M|2,M|2,M|R|2, /* 88 */
1,1,1,1, 1,1,1,1, /* 90 */
1,1,T|5,1, 1,1,1,1, /* 98 */
#if 0 /* cod3_set32() patches this */
T|5,T|5,T|5,T|5, 1,1,1,1, /* A0 */
#else
T|3,T|3,T|3,T|3, 1,1,1,1, /* A0 */
#endif
T|E|2,T|3,1,1, 1,1,1,1, /* A8 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* B0 */
T|3,T|3,T|3,T|3, T|3,T|3,T|3,T|3, /* B8 */
M|T|E|3,M|T|E|3,T|3,1, M|2,M|2,M|T|E|R|3,M|T|R|4, /* C0 */
T|E|4,1,T|3,1, 1,T|E|2,1,1, /* C8 */
M|2,M|2,M|2,M|2, T|E|2,T|E|2,0,1, /* D0 */
/* For the floating instructions, allow room for the FWAIT */
M|2,M|2,M|2,M|2, M|2,M|2,M|2,M|2, /* D8 */
T|E|2,T|E|2,T|E|2,T|E|2, T|E|2,T|E|2,T|E|2,T|E|2, /* E0 */
T|3,T|3,T|5,T|E|2, 1,1,1,1, /* E8 */
1,0,1,1, 1,1,M|A|2,M|A|2, /* F0 */
1,1,1,1, 1,1,M|2,M|R|2 /* F8 */
};
static const unsigned char inssize32[256] =
{ 2,2,2,2, 2,5,1,1, /* 00 */
2,2,2,2, 2,5,1,1, /* 08 */
2,2,2,2, 2,5,1,1, /* 10 */
2,2,2,2, 2,5,1,1, /* 18 */
2,2,2,2, 2,5,1,1, /* 20 */
2,2,2,2, 2,5,1,1, /* 28 */
2,2,2,2, 2,5,1,1, /* 30 */
2,2,2,2, 2,5,1,1, /* 38 */
1,1,1,1, 1,1,1,1, /* 40 */
1,1,1,1, 1,1,1,1, /* 48 */
1,1,1,1, 1,1,1,1, /* 50 */
1,1,1,1, 1,1,1,1, /* 58 */
1,1,2,2, 1,1,1,1, /* 60 */
5,6,2,3, 1,1,1,1, /* 68 */
2,2,2,2, 2,2,2,2, /* 70 */
2,2,2,2, 2,2,2,2, /* 78 */
3,6,3,3, 2,2,2,2, /* 80 */
2,2,2,2, 2,2,2,2, /* 88 */
1,1,1,1, 1,1,1,1, /* 90 */
1,1,7,1, 1,1,1,1, /* 98 */
5,5,5,5, 1,1,1,1, /* A0 */
2,5,1,1, 1,1,1,1, /* A8 */
2,2,2,2, 2,2,2,2, /* B0 */
5,5,5,5, 5,5,5,5, /* B8 */
3,3,3,1, 2,2,3,6, /* C0 */
4,1,3,1, 1,2,1,1, /* C8 */
2,2,2,2, 2,2,0,1, /* D0 */
/* For the floating instructions, don't need room for the FWAIT */
2,2,2,2, 2,2,2,2, /* D8 */
2,2,2,2, 2,2,2,2, /* E0 */
5,5,7,2, 1,1,1,1, /* E8 */
1,0,1,1, 1,1,2,2, /* F0 */
1,1,1,1, 1,1,2,2 /* F8 */
};
/* For 2 byte opcodes starting with 0x0F */
static unsigned char inssize2[256] =
{ M|3,M|3,M|3,M|3, 2,2,2,2, // 00
2,2,M|3,2, 2,2,2,M|T|E|4, // 08
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 10
M|3,2,2,2, 2,2,2,2, // 18
M|3,M|3,M|3,M|3, M|3,2,M|3,2, // 20
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 28
2,2,2,2, 2,2,2,2, // 30
M|4,2,M|T|E|5,2, 2,2,2,2, // 38
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 40
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 48
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 50
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 58
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 60
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 68
M|T|E|4,M|T|E|4,M|T|E|4,M|T|E|4, M|3,M|3,M|3,2, // 70
2,2,2,2, M|3,M|3,M|3,M|3, // 78
W|T|4,W|T|4,W|T|4,W|T|4, W|T|4,W|T|4,W|T|4,W|T|4, // 80
W|T|4,W|T|4,W|T|4,W|T|4, W|T|4,W|T|4,W|T|4,W|T|4, // 88
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 90
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // 98
2,2,2,M|3, M|T|E|4,M|3,2,2, // A0
2,2,2,M|3, M|T|E|4,M|3,M|3,M|3, // A8
M|E|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // B0
M|3,2,M|T|E|4,M|3, M|3,M|3,M|3,M|3, // B8
M|3,M|3,M|T|E|4,M|3, M|T|E|4,M|T|E|4,M|T|E|4,M|3, // C0
2,2,2,2, 2,2,2,2, // C8
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // D0
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // D8
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // E0
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // E8
M|3,M|3,M|3,M|3, M|3,M|3,M|3,M|3, // F0
M|3,M|3,M|3,M|3, M|3,M|3,M|3,2 // F8
};
/*************************************************
* Allocate register temporaries
*/
void REGSAVE::reset()
{
off = 0;
top = 0;
idx = 0;
alignment = REGSIZE;
}
code *REGSAVE::save(code *c, int reg, unsigned *pidx)
{
unsigned i;
if (reg >= XMM0)
{
alignment = 16;
idx = (idx + 15) & ~15;
i = idx;
idx += 16;
// MOVD idx[RBP],xmm
c = genc1(c,0xF20F11,modregxrm(2, reg - XMM0, BPRM),FLregsave,(targ_uns) i);
}
else
{
if (!alignment)
alignment = REGSIZE;
i = idx;
idx += REGSIZE;
// MOV idx[RBP],reg
c = genc1(c,0x89,modregxrm(2, reg, BPRM),FLregsave,(targ_uns) i);
if (I64)
code_orrex(c, REX_W);
}
reflocal = TRUE;
if (idx > top)
top = idx; // keep high water mark
*pidx = i;
return c;
}
code *REGSAVE::restore(code *c, int reg, unsigned idx)
{
if (reg >= XMM0)
{
assert(alignment == 16);
// MOVD xmm,idx[RBP]
c = genc1(c,0xF20F10,modregxrm(2, reg - XMM0, BPRM),FLregsave,(targ_uns) idx);
}
else
{ // MOV reg,idx[RBP]
c = genc1(c,0x8B,modregxrm(2, reg, BPRM),FLregsave,(targ_uns) idx);
if (I64)
code_orrex(c, REX_W);
}
return c;
}
/************************************
* Determine if there is a modregrm byte for code.
*/
int cod3_EA(code *c)
{ unsigned ins;
unsigned op1 = c->Iop & 0xFF;
if (op1 == ESCAPE)
ins = 0;
else if ((c->Iop & 0xFFFD00) == 0x0F3800)
ins = inssize2[(c->Iop >> 8) & 0xFF];
else if ((c->Iop & 0xFF00) == 0x0F00)
ins = inssize2[op1];
else
ins = inssize[op1];
return ins & M;
}
/********************************
* Fix global variables for 386.
*/
void cod3_set32()
{
inssize[0xA0] = T|5;
inssize[0xA1] = T|5;
inssize[0xA2] = T|5;
inssize[0xA3] = T|5;
BPRM = 5; /* [EBP] addressing mode */
fregsaved = mBP | mBX | mSI | mDI; // saved across function calls
FLOATREGS = FLOATREGS_32;
FLOATREGS2 = FLOATREGS2_32;
DOUBLEREGS = DOUBLEREGS_32;
if (config.flags3 & CFG3eseqds)
fregsaved |= mES;
for (unsigned i = 0x80; i < 0x90; i++)
inssize2[i] = W|T|6;
}
/********************************
* Fix global variables for I64.
*/
void cod3_set64()
{
inssize[0xA0] = T|5; // MOV AL,mem
inssize[0xA1] = T|5; // MOV RAX,mem
inssize[0xA2] = T|5; // MOV mem,AL
inssize[0xA3] = T|5; // MOV mem,RAX
BPRM = 5; // [RBP] addressing mode
fregsaved = mBP | mBX | mR12 | mR13 | mR14 | mR15 | mES; // saved across function calls
FLOATREGS = FLOATREGS_64;
FLOATREGS2 = FLOATREGS2_64;
DOUBLEREGS = DOUBLEREGS_64;
STACKALIGN = 16;
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
ALLREGS = mAX|mBX|mCX|mDX|mSI|mDI| mR8|mR9|mR10|mR11|mR12|mR13|mR14|mR15;
BYTEREGS = ALLREGS;
#endif
for (unsigned i = 0x80; i < 0x90; i++)
inssize2[i] = W|T|6;
}
/*********************************
* Word or dword align start of function.
*/
void cod3_align()
{
static unsigned char nops[7] = { 0x90,0x90,0x90,0x90,0x90,0x90,0x90 };
unsigned nbytes;
#if OMFOBJ
if (config.flags4 & CFG4speed) // if optimized for speed
{
// Pick alignment based on CPU target
if (config.target_cpu == TARGET_80486 ||
config.target_cpu >= TARGET_PentiumPro)
{ // 486 does reads on 16 byte boundaries, so if we are near
// such a boundary, align us to it
nbytes = -Coffset & 15;
if (nbytes < 8)
{
Coffset += obj_bytes(cseg,Coffset,nbytes,nops); // XCHG AX,AX
}
}
}
#else
nbytes = -Coffset & 3;
//dbg_printf("cod3_align Coffset %x nbytes %d\n",Coffset,nbytes);
obj_bytes(cseg,Coffset,nbytes,nops);
#endif
}
/*****************************
* Given a type, return a mask of
* registers to hold that type.
* Input:
* tyf function type
*/
regm_t regmask(tym_t tym, tym_t tyf)
{
switch (tybasic(tym))
{
case TYvoid:
case TYstruct:
return 0;
case TYbool:
case TYwchar_t:
case TYchar16:
case TYchar:
case TYschar:
case TYuchar:
case TYshort:
case TYushort:
case TYint:
case TYuint:
#if JHANDLE
case TYjhandle:
#endif
case TYnullptr:
case TYnptr:
#if TARGET_SEGMENTED
case TYsptr:
case TYcptr:
#endif
return mAX;
case TYfloat:
case TYifloat:
if (I64)
return mXMM0;
if (config.exe & EX_flat)
return mST0;
case TYlong:
case TYulong:
case TYdchar:
if (!I16)
return mAX;
#if TARGET_SEGMENTED
case TYfptr:
case TYhptr:
#endif
return mDX | mAX;
case TYcent:
case TYucent:
assert(I64);
return mDX | mAX;
#if TARGET_SEGMENTED
case TYvptr:
return mDX | mBX;
#endif
case TYdouble:
case TYdouble_alias:
case TYidouble:
if (I64)
return mXMM0;
if (config.exe & EX_flat)
return mST0;
return DOUBLEREGS;
case TYllong:
case TYullong:
return I64 ? mAX : (I32 ? mDX | mAX : DOUBLEREGS);
case TYldouble:
case TYildouble:
return mST0;
case TYcfloat:
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
if (I32 && tybasic(tyf) == TYnfunc)
return mDX | mAX;
#endif
case TYcdouble:
if (I64)
return mXMM0 | mXMM1;
case TYcldouble:
return mST01;
default:
#if DEBUG
WRTYxx(tym);
#endif
assert(0);
return 0;
}
}
/*******************************
* Generate block exit code
*/
void outblkexitcode(block *bl, code*& c, int& anyspill, const char* sflsave, symbol** retsym, const regm_t mfuncregsave)
{
elem *e = bl->Belem;
block *nextb;
block *bs1,*bs2;
regm_t retregs = 0;
bool jcond;
switch (bl->BC) /* block exit condition */
{
case BCiftrue:
jcond = TRUE;
bs1 = list_block(bl->Bsucc);
bs2 = list_block(list_next(bl->Bsucc));
if (bs1 == bl->Bnext)
{ // Swap bs1 and bs2
block *btmp;
jcond ^= 1;
btmp = bs1;
bs1 = bs2;
bs2 = btmp;
}
c = cat(c,logexp(e,jcond,FLblock,(code *) bs1));
nextb = bs2;
bl->Bcode = NULL;
L2:
if (nextb != bl->Bnext)
{ if (configv.addlinenumbers && bl->Bsrcpos.Slinnum &&
!(funcsym_p->ty() & mTYnaked))
cgen_linnum(&c,bl->Bsrcpos);
assert(!(bl->Bflags & BFLepilog));
c = cat(c,genjmp(CNIL,JMP,FLblock,nextb));
}
bl->Bcode = cat(bl->Bcode,c);
break;
case BCjmptab:
case BCifthen:
case BCswitch:
assert(!(bl->Bflags & BFLepilog));
doswitch(bl); /* hide messy details */
bl->Bcode = cat(c,bl->Bcode);
break;
#if MARS
case BCjcatch:
// Mark all registers as destroyed. This will prevent
// register assignments to variables used in catch blocks.
c = cat(c,getregs((I32 | I64) ? allregs : (ALLREGS | mES)));
#if 0 && TARGET_LINUX
if (config.flags3 & CFG3pic && !(allregs & mBX))
{
c = cat(c, cod3_load_got());
}
#endif
goto case_goto;
#endif
#if SCPP
case BCcatch:
// Mark all registers as destroyed. This will prevent
// register assignments to variables used in catch blocks.
c = cat(c,getregs(allregs | mES));
#if 0 && TARGET_LINUX
if (config.flags3 & CFG3pic && !(allregs & mBX))
{
c = cat(c, cod3_load_got());
}
#endif
goto case_goto;
case BCtry:
usednteh |= EHtry;
if (config.flags2 & CFG2seh)
usednteh |= NTEHtry;
goto case_goto;
#endif
case BCgoto:
nextb = list_block(bl->Bsucc);
if ((funcsym_p->Sfunc->Fflags3 & Fnteh ||
(MARS /*&& config.flags2 & CFG2seh*/)) &&
bl->Btry != nextb->Btry &&
nextb->BC != BC_finally)
{ int toindex;
int fromindex;
bl->Bcode = NULL;
c = gencodelem(c,e,&retregs,TRUE);
toindex = nextb->Btry ? nextb->Btry->Bscope_index : -1;
assert(bl->Btry);
fromindex = bl->Btry->Bscope_index;
#if MARS
if (toindex + 1 == fromindex)
{ // Simply call __finally
if (bl->Btry &&
list_block(list_next(bl->Btry->Bsucc))->BC == BCjcatch)
{
goto L2;
}
}
#endif
if (config.flags2 & CFG2seh)
c = cat(c,nteh_unwind(0,toindex));
#if MARS && (TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS)
else if (toindex + 1 <= fromindex)
{
//c = cat(c, linux_unwind(0, toindex));
block *bt;
//printf("B%d: fromindex = %d, toindex = %d\n", bl->Bdfoidx, fromindex, toindex);
bt = bl;
while ((bt = bt->Btry) != NULL && bt->Bscope_index != toindex)
{ block *bf;
//printf("\tbt->Bscope_index = %d, bt->Blast_index = %d\n", bt->Bscope_index, bt->Blast_index);
bf = list_block(list_next(bt->Bsucc));
// Only look at try-finally blocks
if (bf->BC == BCjcatch)
continue;
if (bf == nextb)
continue;
//printf("\tbf = B%d, nextb = B%d\n", bf->Bdfoidx, nextb->Bdfoidx);
if (nextb->BC == BCgoto &&
!nextb->Belem &&
bf == list_block(nextb->Bsucc))
continue;
// call __finally
code *cs;
code *cr;
int nalign = 0;
gensaverestore(retregs,&cs,&cr);
if (STACKALIGN == 16)
{ int npush = (numbitsset(retregs) + 1) * REGSIZE;
if (npush & (STACKALIGN - 1))
{ nalign = STACKALIGN - (npush & (STACKALIGN - 1));
cs = genc2(cs,0x81,modregrm(3,5,SP),nalign); // SUB ESP,nalign
if (I64)
code_orrex(cs, REX_W);
}
}
cs = genc(cs,0xE8,0,0,0,FLblock,(long)list_block(bf->Bsucc));
if (nalign)
{ cs = genc2(cs,0x81,modregrm(3,0,SP),nalign); // ADD ESP,nalign
if (I64)
code_orrex(cs, REX_W);
}
c = cat3(c,cs,cr);
}
}
#endif
goto L2;
}
case_goto:
c = gencodelem(c,e,&retregs,TRUE);
if (anyspill)
{ // Add in the epilog code
code *cstore = NULL;
code *cload = NULL;
for (int i = 0; i < anyspill; i++)
{ symbol *s = globsym.tab[i];
if (s->Sflags & SFLspill &&
vec_testbit(dfoidx,s->Srange))
{
s->Sfl = sflsave[i]; // undo block register assignments
cgreg_spillreg_epilog(bl,s,&cstore,&cload);
}
}
c = cat3(c,cstore,cload);
}
L3:
bl->Bcode = NULL;
nextb = list_block(bl->Bsucc);
goto L2;
case BC_try:
if (config.flags2 & CFG2seh)
{ usednteh |= NTEH_try;
nteh_usevars();
}
else
usednteh |= EHtry;
goto case_goto;
case BC_finally:
// Mark all registers as destroyed. This will prevent
// register assignments to variables used in finally blocks.
assert(!getregs(allregs));
assert(!e);
assert(!bl->Bcode);
#if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_OPENBSD || TARGET_SOLARIS
if (config.flags3 & CFG3pic)
{
int nalign = 0;
if (STACKALIGN == 16)
{ nalign = STACKALIGN - REGSIZE;
c = genc2(c,0x81,modregrm(3,5,SP),nalign); // SUB ESP,nalign
if (I64)
code_orrex(c, REX_W);
}
// CALL bl->Bsucc
c = genc(c,0xE8,0,0,0,FLblock,(long)list_block(bl->Bsucc));
if (nalign)
{ c = genc2(c,0x81,modregrm(3,0,SP),nalign); // ADD ESP,nalign
if (I64)
code_orrex(c, REX_W);
}
// JMP list_next(bl->Bsucc)
nextb = list_block(list_next(bl->Bsucc));
goto L2;
}
else
#endif
{
// Generate a PUSH of the address of the successor to the
// corresponding BC_ret
//assert(list_block(list_next(bl->Bsucc))->BC == BC_ret);
// PUSH &succ
c = genc(c,0x68,0,0,0,FLblock,(long)list_block(list_next(bl->Bsucc)));
nextb = list_block(bl->Bsucc);
goto L2;
}
case BC_ret:
c = gencodelem(c,e,&retregs,TRUE);
bl->Bcode = gen1(c,0xC3); // RET
break;
#if NTEXCEPTIONS
case BC_except:
assert(!e);
usednteh |= NTEH_except;
c = cat(c,nteh_setsp(0x8B));
getregs(allregs);
goto L3;
case BC_filter:
c = cat(c,nteh_filter(bl));
// Mark all registers as destroyed. This will prevent
// register assignments to variables used in filter blocks.
getregs(allregs);
retregs = regmask(e->Ety, TYnfunc);
c = gencodelem(c,e,&retregs,TRUE);
bl->Bcode = gen1(c,0xC3); // RET
break;
#endif
case BCretexp:
retregs = regmask(e->Ety, funcsym_p->ty());
// For the final load into the return regs, don't set regcon.used,
// so that the optimizer can potentially use retregs for register
// variable assignments.
if (config.flags4 & CFG4optimized)
{ regm_t usedsave;
c = cat(c,docommas(&e));
usedsave = regcon.used;
if (EOP(e))
c = gencodelem(c,e,&retregs,TRUE);
else
{
if (e->Eoper == OPconst)
regcon.mvar = 0;
c = gencodelem(c,e,&retregs,TRUE);
regcon.used = usedsave;
if (e->Eoper == OPvar)
{ symbol *s = e->EV.sp.Vsym;
if (s->Sfl == FLreg && s->Sregm != mAX)
*retsym = s;
}
}
}
else
{
case BCret:
case BCexit:
c = gencodelem(c,e,&retregs,TRUE);
}
bl->Bcode = c;
if (retregs == mST0)
{ assert(stackused == 1);
pop87(); // account for return value
}
else if (retregs == mST01)
{ assert(stackused == 2);
pop87();
pop87(); // account for return value
}
if (bl->BC == BCexit && config.flags4 & CFG4optimized)
mfuncreg = mfuncregsave;
if (MARS || usednteh & NTEH_try)
{ block *bt;
bt = bl;
while ((bt = bt->Btry) != NULL)
{ block *bf;
bf = list_block(list_next(bt->Bsucc));
#if MARS
// Only look at try-finally blocks
if (bf->BC == BCjcatch)
{
continue;
}
#endif
if (config.flags2 & CFG2seh)
{
if (bt->Bscope_index == 0)
{
// call __finally
code *cs;
code *cr;
c = cat(c,nteh_gensindex(-1));
gensaverestore(retregs,&cs,&cr);
cs = genc(cs,0xE8,0,0,0,FLblock,(long)list_block(bf->Bsucc));
bl->Bcode = cat3(c,cs,cr);
}
else
bl->Bcode = cat(c,nteh_unwind(retregs,~0));
break;
}
else
{
// call __finally
code *cs;
code *cr;
int nalign = 0;
gensaverestore(retregs,&cs,&cr);
if (STACKALIGN == 16)
{ int npush = (numbitsset(retregs) + 1) * REGSIZE;
if (npush & (STACKALIGN - 1))
{ nalign = STACKALIGN - (npush & (STACKALIGN - 1));
cs = genc2(cs,0x81,modregrm(3,5,SP),nalign); // SUB ESP,nalign
if (I64)
code_orrex(cs, REX_W);
}
}
// CALL bf->Bsucc
cs = genc(cs,0xE8,0,0,0,FLblock,(long)list_block(bf->Bsucc));
if (nalign)
{ cs = genc2(cs,0x81,modregrm(3,0,SP),nalign); // ADD ESP,nalign
if (I64)
code_orrex(cs, REX_W);
}
bl->Bcode = c = cat3(c,cs,cr);
}
}
}
break;
#if SCPP || MARS
case BCasm:
assert(!e);
// Mark destroyed registers
assert(!c);
c = cat(c,getregs(iasm_regs(bl)));
if (bl->Bsucc)
{ nextb = list_block(bl->Bsucc);
if (!bl->Bnext)
goto L2;
if (nextb != bl->Bnext &&
bl->Bnext &&
!(bl->Bnext->BC == BCgoto &&
!bl->Bnext->Belem &&
nextb == list_block(bl->Bnext->Bsucc)))
{ code *cl;
// See if already have JMP at end of block
cl = code_last(bl->Bcode);
if (!cl || cl->Iop != JMP)
goto L2; // add JMP at end of block
}
}
break;
#endif
default:
#ifdef DEBUG
printf("bl->BC = %d\n",bl->BC);
#endif
assert(0);
}
}
/*******************************
* Generate code for blocks ending in a switch statement.
* Take BCswitch and decide on
* BCifthen use if - then code
* BCjmptab index into jump table
* BCswitch search table for match
*/
void doswitch(block *b)
{ code *cc,*c,*ce;
regm_t retregs;
unsigned ncases,n,reg,reg2,rm;
targ_llong vmax,vmin,val;
targ_llong *p;
list_t bl;
elem *e;
tym_t tys;
int sz;
unsigned char dword;
unsigned char mswsame;
#if LONGLONG
targ_ulong msw;
#else
unsigned msw;
#endif
e = b->Belem;
elem_debug(e);
cc = docommas(&e);
cgstate.stackclean++;
tys = tybasic(e->Ety);
sz = tysize[tys];
dword = (sz == 2 * REGSIZE);
mswsame = 1; // assume all msw's are the same
p = b->BS.Bswitch; /* pointer to case data */
assert(p);
ncases = *p++; /* number of cases */
vmax = MINLL; // smallest possible llong
vmin = MAXLL; // largest possible llong
for (n = 0; n < ncases; n++) // find max and min case values
{ val = *p++;
if (val > vmax) vmax = val;
if (val < vmin) vmin = val;
if (REGSIZE == 2)
{
unsigned short ms = (val >> 16) & 0xFFFF;
if (n == 0)
msw = ms;
else if (msw != ms)
mswsame = 0;
}
else // REGSIZE == 4
{
targ_ulong ms = (val >> 32) & 0xFFFFFFFF;
if (n == 0)
msw = ms;
else if (msw != ms)
mswsame = 0;
}
}
p -= ncases;
//dbg_printf("vmax = x%lx, vmin = x%lx, vmax-vmin = x%lx\n",vmax,vmin,vmax - vmin);
if (I64)
{ // For now, just generate basic if-then sequence to get us running
retregs = ALLREGS;
b->BC = BCifthen;
c = scodelem(e,&retregs,0,TRUE);
assert(!dword); // 128 bit switches not supported
reg = findreg(retregs); // reg that result is in
bl = b->Bsucc;
for (n = 0; n < ncases; n++)
{ code *cx;
val = *p;
if (sz == 4)
cx = genc2(CNIL,0x81,modregrmx(3,7,reg),val); // CMP reg,val
else if (sz == 8)
{
if (val == (int)val) // if val is a 64 bit value sign-extended from 32 bits
{
cx = genc2(CNIL,0x81,modregrmx(3,7,reg),val); // CMP reg,value32
cx->Irex |= REX_W; // 64 bit operand
}
else
{ unsigned sreg;
// MOV sreg,value64
cx = regwithvalue(CNIL, ALLREGS & ~mask[reg], val, &sreg, 64);
cx = genregs(cx,0x3B,reg,sreg); // CMP reg,sreg
code_orrex(cx, REX_W);
}
}
else
assert(0);
bl = list_next(bl);
genjmp(cx,JE,FLblock,list_block(bl)); // JE caseaddr
c = cat(c,cx);
p++;
}
if (list_block(b->Bsucc) != b->Bnext) /* if default is not next block */
c = cat(c,genjmp(CNIL,JMP,FLblock,list_block(b->Bsucc)));
ce = NULL;
}
// Need to do research on MACHOBJ to see about better methods
else if (MACHOBJ || ncases <= 3)
{ // generate if-then sequence
retregs = ALLREGS;
L1:
b->BC = BCifthen;
c = scodelem(e,&retregs,0,TRUE);
if (dword)
{ reg = findreglsw(retregs);
reg2 = findregmsw(retregs);
}
else
reg = findreg(retregs); /* reg that result is in */
bl = b->Bsucc;
if (dword && mswsame)
{ /* CMP reg2,MSW */
c = genc2(c,0x81,modregrm(3,7,reg2),msw);
genjmp(c,JNE,FLblock,list_block(b->Bsucc)); /* JNE default */
}
for (n = 0; n < ncases; n++)
{ code *cnext = CNIL;
/* CMP reg,casevalue */
c = cat(c,ce = genc2(CNIL,0x81,modregrm(3,7,reg),(targ_int)*p));
if (dword && !mswsame)
{
cnext = gennop(CNIL);
genjmp(ce,JNE,FLcode,(block *) cnext);
genc2(ce,0x81,modregrm(3,7,reg2),MSREG(*p));
}
bl = list_next(bl);
/* JE caseaddr */
genjmp(ce,JE,FLblock,list_block(bl));
c = cat(c,cnext);
p++;
}
if (list_block(b->Bsucc) != b->Bnext) /* if default is not next block */
c = cat(c,genjmp(CNIL,JMP,FLblock,list_block(b->Bsucc)));
ce = NULL;
}
#if TARGET_WINDOS // try and find relocation to support this
else if ((targ_ullong)(vmax - vmin) <= ncases * 2) // then use jump table
{ int modify;
b->BC = BCjmptab;
retregs = IDXREGS;
if (dword)
retregs |= mMSW;
modify = (vmin || !I32);
c = scodelem(e,&retregs,0,!modify);
reg = findreg(retregs & IDXREGS); /* reg that result is in */
if (dword)
reg2 = findregmsw(retregs);
if (modify)
{
assert(!(retregs & regcon.mvar));