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I found that some parts of your code utilize RDMA atomic operations and READ/WRITE on the same memory region. (e.g., The node_type in Header). However, it may harm the correctness of synchronization.
The Infiniband Architecture Specification 1.4 has pointed out in section 10.7.2.3 that it's unsafe to simultaneously use atomic and nonatomic operations on the same memory region.
I believe the reason is that "atomic" is only effective for the NIC execution but not for the flushing through PCIe.
Recent paper SIGMOD'23 Design Guidelines for Correct, Efficient, and Scalable Synchronization using One-Sided RDMA and this QA https://lore.kernel.org/linux-rdma/20200512113512.GK4814@unreal/T/ confirms my point.
Thus, I want to ask: Is it a bug in your code? If it isn't, how did you further ensure the correctness of synchronization?
The text was updated successfully, but these errors were encountered:
Besides, I have some questions about the "Header Split" part of your paper, where only concurrent search is discussed.
However, if there are two insert operations that want to split the same header, how do they synchronize?
For example, in your example of the paper, except "k6: 0x120577AC", assuming there is another key "k8: 0x130577AC".
Both of them can read the partial key "1234" in node A. How do they concurrently do header split in a lock-free way?
Hello, may I ask if there is an answer to this question? I'm also very curious about how to achieve concurrent execution with lock-free mechanisms for two or more writers during header split and node type switching. I hope to receive your reply, and I appreciate your assistance greatly!
Hi,
I found that some parts of your code utilize RDMA atomic operations and READ/WRITE on the same memory region. (e.g., The node_type in Header). However, it may harm the correctness of synchronization.
The Infiniband Architecture Specification 1.4 has pointed out in section 10.7.2.3 that it's unsafe to simultaneously use atomic and nonatomic operations on the same memory region.
I believe the reason is that "atomic" is only effective for the NIC execution but not for the flushing through PCIe.
Recent paper SIGMOD'23 Design Guidelines for Correct, Efficient, and Scalable Synchronization using One-Sided RDMA and this QA https://lore.kernel.org/linux-rdma/20200512113512.GK4814@unreal/T/ confirms my point.
Thus, I want to ask: Is it a bug in your code? If it isn't, how did you further ensure the correctness of synchronization?
The text was updated successfully, but these errors were encountered: