Fix extraction of uchar4 components

Fixes google#55

lib/SPIRVProducerPass.cpp

@@ -3866,6 +3866,9 @@ void SPIRVProducerPass::GenerateInstruction(Instruction &I) {
       Op1IDOp = new SPIRVOperand(SPIRVOperandType::NUMBERID, Op1ID);
       Ops.push_back(Op1IDOp);
 
+      // Reset mapping for this value to the result of the bitwise and.
+      VMap[&I] = nextID;
+
       Inst = new SPIRVInstruction(5, spv::OpBitwiseAnd, nextID++, Ops);
       SPIRVInstList.push_back(Inst);
       break;

test/uchar4_extract_to_float.cl

@@ -0,0 +1,59 @@
+// Test for https://github.com/google/clspv/issues/55
+// Extraction of char values from a uchar4.
+
+// RUN: clspv %s -S -o %t.spvasm
+// RUN: FileCheck %s < %t.spvasm
+// RUN: clspv %s -o %t.spv
+// RUN: spirv-dis -o %t2.spvasm %t.spv
+// RUN: FileCheck %s < %t2.spvasm
+// RUN: spirv-val --target-env vulkan1.0 %t.spv
+
+kernel void foo(global uchar4* IN, global float4* OUT) {
+  uchar4 in4 = *IN;
+  float4 result;
+  result.x = in4.x;
+  result.y = in4.y;
+  result.z = in4.z;
+  result.w = in4.w;
+  *OUT = result;
+}
+
+
+// CHECK-DAG: [[float:%[_a-zA-Z0-9]+]] = OpTypeFloat 32
+// CHECK-DAG: [[float4:%[_a-zA-Z0-9]+]] = OpTypeVector [[float]] 4
+// CHECK-DAG: [[uint:%[_a-zA-Z0-9]+]] = OpTypeInt 32 0
+// CHECK-NOT: checking barrier
+// CHECK-DAG: [[uint_0:%[_a-zA-Z0-9]+]] = OpConstant [[uint]] 0
+// CHECK-DAG: [[uint_255:%[_a-zA-Z0-9]+]] = OpConstant [[uint]] 255
+// CHECK-DAG: [[uint_8:%[_a-zA-Z0-9]+]] = OpConstant [[uint]] 8
+// CHECK-DAG: [[uint_16:%[_a-zA-Z0-9]+]] = OpConstant [[uint]] 16
+// CHECK-DAG: [[uint_24:%[_a-zA-Z0-9]+]] = OpConstant [[uint]] 24
+// CHECK-DAG: [[undef_float4:%[_a-zA-Z0-9]+]] = OpUndef [[float4]]
+
+
+// There is only one load
+// CHECK: [[load:%[_a-zA-Z0-9]+]] = OpLoad [[uint]] {{%[_0-9a-zA-Z]+}}
+// CHECK-NOT: OpLoad
+
+// CHECK: [[c0:%[_a-zA-Z0-9]+]] = OpShiftRightLogical [[uint]] [[load]] [[uint_0]]
+// CHECK: [[and0:%[_a-zA-Z0-9]+]] = OpBitwiseAnd [[uint]] [[c0]] [[uint_255]]
+// CHECK: [[f0:%[_a-zA-Z0-9]+]] = OpConvertUToF [[float]] [[and0]]
+// CHECK: [[v0:%[_a-zA-Z0-9]+]] = OpCompositeInsert [[float4]] [[f0]] [[undef_float4]] 0
+
+// CHECK: [[c1:%[_a-zA-Z0-9]+]] = OpShiftRightLogical [[uint]] [[load]] [[uint_8]]
+// CHECK: [[and1:%[_a-zA-Z0-9]+]] = OpBitwiseAnd [[uint]] [[c1]] [[uint_255]]
+// CHECK: [[f1:%[_a-zA-Z0-9]+]] = OpConvertUToF [[float]] [[and1]]
+// CHECK: [[v1:%[_a-zA-Z0-9]+]] = OpCompositeInsert [[float4]] [[f1]] [[v0]] 1
+
+// CHECK: [[c2:%[_a-zA-Z0-9]+]] = OpShiftRightLogical [[uint]] [[load]] [[uint_16]]
+// CHECK: [[and2:%[_a-zA-Z0-9]+]] = OpBitwiseAnd [[uint]] [[c2]] [[uint_255]]
+// CHECK: [[f2:%[_a-zA-Z0-9]+]] = OpConvertUToF [[float]] [[and2]]
+// CHECK: [[v2:%[_a-zA-Z0-9]+]] = OpCompositeInsert [[float4]] [[f2]] [[v1]] 2
+
+// CHECK: [[c3:%[_a-zA-Z0-9]+]] = OpShiftRightLogical [[uint]] [[load]] [[uint_24]]
+// CHECK: [[and3:%[_a-zA-Z0-9]+]] = OpBitwiseAnd [[uint]] [[c3]] [[uint_255]]
+// CHECK: [[f3:%[_a-zA-Z0-9]+]] = OpConvertUToF [[float]] [[and3]]
+// CHECK: [[v3:%[_a-zA-Z0-9]+]] = OpCompositeInsert [[float4]] [[f3]] [[v2]] 3
+
+// CHECK: OpStore {{%[_0-9a-zA-Z]+}} [[v3]]
+// CHECK-NOT: OpStore