Jit64: addx - Emit nothing when possible

When the destination register matches a source register, the other
source register contains zero, and overflow isn't needed, the
instruction becomes a nop and we don't need to emit anything.

We could add specialized handling for the case where overflow is needed,
but none of the titles I tried would hit this path.

Before:
83 C7 00             add         edi,0

After:

Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp

@@ -1333,7 +1333,10 @@ void Jit64::addx(UGeckoInstruction inst)
     if ((d == a) || (d == b))
     {
       RCOpArg& Rnotd = (d == a) ? Rb : Ra;
-      ADD(32, Rd, Rnotd);
+      if (!Rnotd.IsZero() || inst.OE)
+      {
+        ADD(32, Rd, Rnotd);
+      }
     }
     else if (Ra.IsSimpleReg() && Rb.IsSimpleReg() && !inst.OE)
     {