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JitArm64: Add special zero case to ADDI2R
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This normally doesn't reduce the instruction count, but is nonetheless
useful on CPUs that can do 0-cycle moves.
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JosJuice committed Dec 1, 2023
1 parent 25ffb0d commit 67791d2
Showing 1 changed file with 11 additions and 1 deletion.
12 changes: 11 additions & 1 deletion Source/Core/Common/Arm64Emitter.cpp
Expand Up @@ -4125,14 +4125,24 @@ void ARM64XEmitter::AddImmediate(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool shift,
void ARM64XEmitter::ADDI2R_internal(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool negative, bool flags,
ARM64Reg scratch)
{
DEBUG_ASSERT(Is64Bit(Rd) == Is64Bit(Rn));

if (!Is64Bit(Rd))
imm &= 0xFFFFFFFFULL;

bool has_scratch = scratch != ARM64Reg::INVALID_REG;
u64 imm_neg = Is64Bit(Rd) ? u64(-s64(imm)) : u64(-s64(imm)) & 0xFFFFFFFFuLL;
bool neg_neg = negative ? false : true;

// Fast paths, aarch64 immediate instructions
// Special path for zeroes
if (imm == 0 && !flags)
{
if (Rd != Rn)
MOV(Rd, Rn);
return;
}

// Regular fast paths, aarch64 immediate instructions
// Try them all first
if (imm <= 0xFFF)
{
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