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Make memory breakpoint faster
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Currently, slowmem is used at any time that memory breakpoints are in use.  This commit makes it so that whenever the DBAT gets updated, if the address is overllaping any memchecks, it forces the use of slowmem.  This allows to keep fastmem for any other cases and noticably increases performance when using memory breakpoints.
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aldelaro5 committed Feb 25, 2017
1 parent 5cee3f9 commit 71651d6
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Showing 3 changed files with 31 additions and 2 deletions.
8 changes: 8 additions & 0 deletions Source/Core/Core/PowerPC/BreakPoints.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -11,8 +11,10 @@

#include "Common/CommonTypes.h"
#include "Common/DebugInterface.h"
#include "Core/Core.h"
#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Core/PowerPC/JitCommon/JitCache.h"
#include "Core/PowerPC/PowerPC.h"

bool BreakPoints::IsAddressBreakPoint(u32 address) const
{
Expand Down Expand Up @@ -171,6 +173,9 @@ void MemChecks::Add(const TMemCheck& memory_check)
bool had_any = HasAny();
if (GetMemCheck(memory_check.start_address) == nullptr)
m_mem_checks.push_back(memory_check);
bool lock = Core::PauseAndLock(true);
PowerPC::DBATUpdated();
Core::PauseAndLock(false, lock);
// If this is the first one, clear the JIT cache so it can switch to
// watchpoint-compatible code.
if (!had_any && g_jit)
Expand All @@ -186,6 +191,9 @@ void MemChecks::Remove(u32 address)
m_mem_checks.erase(i);
if (!HasAny() && g_jit)
g_jit->GetBlockCache()->SchedulateClearCacheThreadSafe();
bool lock = Core::PauseAndLock(true);
PowerPC::DBATUpdated();
Core::PauseAndLock(false, lock);
return;
}
}
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3 changes: 1 addition & 2 deletions Source/Core/Core/PowerPC/JitCommon/JitBase.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,6 @@ bool JitBase::MergeAllowedNextInstructions(int count)
void JitBase::UpdateMemoryOptions()
{
bool any_watchpoints = PowerPC::memchecks.HasAny();
jo.fastmem = SConfig::GetInstance().bFastmem && !any_watchpoints;
jo.fastmem = SConfig::GetInstance().bFastmem;
jo.memcheck = SConfig::GetInstance().bMMU || any_watchpoints;
jo.alwaysUseMemFuncs = any_watchpoints;
}
22 changes: 22 additions & 0 deletions Source/Core/Core/PowerPC/MMU.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1116,6 +1116,26 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
return TranslateAddressResult{TranslateAddressResult::PAGE_FAULT, 0};
}

static bool overlaps_memcheck(u32 pageEndAddress)
{
if (!memchecks.HasAny())
return false;
u32 page_end_suffix = ((1 << BAT_INDEX_SHIFT)) - 1;
for (TMemCheck memcheck : memchecks.GetMemChecks())
{
u32 memcheck_region_page_start = 0x00FFFFFF & memcheck.start_address;
u32 memcheck_region_page_end = 0x00FFFFFF & memcheck.end_address;
if (((memcheck_region_page_start | page_end_suffix) == pageEndAddress ||
(memcheck_region_page_end | page_end_suffix) == pageEndAddress) ||
((memcheck_region_page_start | page_end_suffix) < pageEndAddress &&
(memcheck_region_page_end | page_end_suffix) > pageEndAddress))
{
return true;
}
}
return false;
}

static void UpdateBATs(BatTable& bat_table, u32 base_spr)
{
// TODO: Separate BATs for MSR.PR==0 and MSR.PR==1
Expand Down Expand Up @@ -1175,6 +1195,8 @@ static void UpdateBATs(BatTable& bat_table, u32 base_spr)
valid_bit = 0x3;
else if ((address >> 28) == 0xE && (address < (0xE0000000 + Memory::L1_CACHE_SIZE)))
valid_bit = 0x3;
if (overlaps_memcheck(address | ((1 << BAT_INDEX_SHIFT) - 1)))
valid_bit &= ~0x2;

// (BEPI | j) == (BEPI & ~BL) | (j & BL).
bat_table[batu.BEPI | j] = address | valid_bit;
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