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VertexLoaderX64: generate PIC
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Address static memory relative to a base register, analog to what we're
doing with PPCSTATE in the CPU JIT. This allows executable memory for
the vertex loader JIT to be allocated anywhere, not just within 2 GiB of
static data.

Based on the assumption that the compiler will probably allocate
cached_arraybases right in front of g_main_cp_state, move
CPState.array_strides to the start of the struct. That way, if the
assumption holds, we will always get s8 offsets for those two arrays.

Fixes issue 8180.
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Tilka committed May 31, 2015
1 parent c12f04e commit b618344
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Showing 3 changed files with 29 additions and 16 deletions.
2 changes: 1 addition & 1 deletion Source/Core/Core/State.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ static Common::Event g_compressAndDumpStateSyncEvent;
static std::thread g_save_thread;

// Don't forget to increase this after doing changes on the savestate system
static const u32 STATE_VERSION = 44; // Last changed in PR 2464
static const u32 STATE_VERSION = 45; // Last changed in PR 2487

// Maps savestate versions to Dolphin versions.
// Versions after 42 don't need to be added to this list,
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2 changes: 1 addition & 1 deletion Source/Core/VideoCommon/CPMemory.h
Original file line number Diff line number Diff line change
Expand Up @@ -239,8 +239,8 @@ class VertexLoaderBase;
// STATE_TO_SAVE
struct CPState final
{
u32 array_bases[16];
u32 array_strides[16];
u32 array_bases[16];
TMatrixIndexA matrix_index_a;
TMatrixIndexB matrix_index_b;
TVtxDesc vtx_desc;
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41 changes: 27 additions & 14 deletions Source/Core/VideoCommon/VertexLoaderX64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,14 @@ static const X64Reg scratch2 = ABI_PARAM3;
static const X64Reg scratch3 = ABI_PARAM4;
static const X64Reg count_reg = R10;
static const X64Reg skipped_reg = R11;
static const X64Reg base_reg = RBX;

static const u8* memory_base_ptr = (u8*)&g_main_cp_state;

static OpArg MPIC(const void* ptr)
{
return MDisp(base_reg, (u8*)ptr - memory_base_ptr);
}

VertexLoaderX64::VertexLoaderX64(const TVtxDesc& vtx_desc, const VAT& vtx_att) : VertexLoaderBase(vtx_desc, vtx_att)
{
Expand Down Expand Up @@ -56,9 +64,8 @@ OpArg VertexLoaderX64::GetVertexAddr(int array, u64 attribute)
CMP(attribute == INDEX8 ? 8 : 16, R(scratch1), Imm8(-1));
m_skip_vertex = J_CC(CC_E, true);
}
// TODO: Move cached_arraybases into CPState and use MDisp() relative to a constant register loaded with &g_main_cp_state.
IMUL(32, scratch1, M(&g_main_cp_state.array_strides[array]));
MOV(64, R(scratch2), M(&cached_arraybases[array]));
IMUL(32, scratch1, MPIC(&g_main_cp_state.array_strides[array]));
MOV(64, R(scratch2), MPIC(&cached_arraybases[array]));
return MRegSum(scratch1, scratch2);
}
else
Expand Down Expand Up @@ -135,7 +142,7 @@ int VertexLoaderX64::ReadVertex(OpArg data, u64 attribute, int format, int count
else
MOVD_xmm(coords, data);

PSHUFB(coords, M(&shuffle_lut[format][count_in - 1]));
PSHUFB(coords, MPIC(&shuffle_lut[format][count_in - 1]));

// Sign-extend.
if (format == FORMAT_BYTE)
Expand Down Expand Up @@ -192,13 +199,13 @@ int VertexLoaderX64::ReadVertex(OpArg data, u64 attribute, int format, int count
CVTDQ2PS(coords, R(coords));

if (dequantize && scaling_exponent)
MULPS(coords, M(&scale_factors[scaling_exponent]));
MULPS(coords, MPIC(&scale_factors[scaling_exponent]));

switch (count_out)
{
case 1: MOVSS(dest, coords); break;
case 2: MOVLPS(dest, coords); break;
case 3: MOVUPS(dest, coords); break;
case 1: MOVSS(dest, coords); break;
case 2: MOVLPS(dest, coords); break;
case 3: MOVUPS(dest, coords); break;
}

return load_bytes;
Expand Down Expand Up @@ -352,17 +359,23 @@ void VertexLoaderX64::ReadColor(OpArg data, u64 attribute, int format)

void VertexLoaderX64::GenerateVertexLoader()
{
BitSet32 xmm_regs;
xmm_regs[XMM0+16] = true;
xmm_regs[XMM1+16] = !cpu_info.bSSSE3;
ABI_PushRegistersAndAdjustStack(xmm_regs, 8);
BitSet32 regs = {src_reg, dst_reg, scratch1, scratch2, scratch3, count_reg, skipped_reg, base_reg};
regs &= ABI_ALL_CALLEE_SAVED;
ABI_PushRegistersAndAdjustStack(regs, 0);

// Backup count since we're going to count it down.
PUSH(32, R(ABI_PARAM3));

// ABI_PARAM3 is one of the lower registers, so free it for scratch2.
MOV(32, R(count_reg), R(ABI_PARAM3));

// Load memory base.
u64 memory_base = (u64)memory_base_ptr;
if (memory_base <= INT32_MAX)
MOV(32, R(base_reg), Imm32(memory_base));
else
MOV(64, R(base_reg), Imm64(memory_base));

if (m_VtxDesc.Position & MASK_INDEXED)
XOR(32, R(skipped_reg), R(skipped_reg));

Expand Down Expand Up @@ -492,7 +505,7 @@ void VertexLoaderX64::GenerateVertexLoader()
// Get the original count.
POP(32, R(ABI_RETURN));

ABI_PopRegistersAndAdjustStack(xmm_regs, 8);
ABI_PopRegistersAndAdjustStack(regs, 0);

if (m_VtxDesc.Position & MASK_INDEXED)
{
Expand All @@ -515,5 +528,5 @@ void VertexLoaderX64::GenerateVertexLoader()
int VertexLoaderX64::RunVertices(DataReader src, DataReader dst, int count)
{
m_numLoadedVertices += count;
return ((int (*)(u8* src, u8* dst, int count))region)(src.GetPointer(), dst.GetPointer(), count);
return ((int (*)(u8*, u8*, int))region)(src.GetPointer(), dst.GetPointer(), count);
}

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