Merge pull request #2090 from magumagu/jit-gatherpipe-address

Refactor gather-pipe address checking.
dolphin-emu · Feb 23, 2015 · b9157c5 · b9157c5
2 parents 0ff7e20 + 917a900
commit b9157c5
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Showing 6 changed files with 13 additions and 4 deletions.
diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp
@@ -120,7 +120,7 @@ void JitArm::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, int accessSize
 
 	if (is_immediate)
 	{
-		if ((imm_addr & 0xFFFFF000) == 0xCC008000 && jit->jo.optimizeGatherPipe)
+		if (jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
 		{
 			MOVI2R(R14, (u32)&GPFifo::m_gatherPipeCount);
 			MOVI2R(R10, (u32)GPFifo::m_gatherPipe);

diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp
@@ -350,7 +350,7 @@ void JitArm::stfXX(UGeckoInstruction inst)
 
 	if (is_immediate)
 	{
-		if ((imm_addr & 0xFFFFF000) == 0xCC008000 && jit->jo.optimizeGatherPipe)
+		if (jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
 		{
 			int accessSize;
 			if (flags & BackPatchInfo::FLAG_SIZE_F64)

diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
@@ -371,7 +371,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
 
 	if (is_immediate)
 	{
-		if ((imm_addr & 0xFFFFF000) == 0xCC008000 && jit->jo.optimizeGatherPipe)
+		if (jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
 		{
 			int accessSize;
 			if (flags & BackPatchInfo::FLAG_SIZE_F64)

diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
@@ -477,7 +477,7 @@ bool EmuCodeBlock::WriteToConstAddress(int accessSize, OpArg arg, u32 address, B
 
 	// If we already know the address through constant folding, we can do some
 	// fun tricks...
-	if ((address & 0xFFFFF000) == 0xCC008000 && jit->jo.optimizeGatherPipe)
+	if (jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(address))
 	{
 		if (!arg.IsSimpleReg() || arg.GetSimpleReg() != RSCRATCH)
 			MOV(accessSize, R(RSCRATCH), arg);

diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp
@@ -763,6 +763,14 @@ u32 IsOptimizableMMIOAccess(u32 address, u32 accessSize)
 	return translated;
 }
 
+bool IsOptimizableGatherPipeWrite(u32 address)
+{
+	if (!UReg_MSR(MSR).DR)
+		return false;
+
+	return address == 0xCC008000;
+}
+
 // *********************************************************************************
 // Warning: Test Area
 //

diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h
@@ -270,6 +270,7 @@ void InvalidateTLBEntry(u32 address);
 // memory access.  Does not consider page tables.
 bool IsOptimizableRAMAddress(const u32 address);
 u32 IsOptimizableMMIOAccess(u32 address, u32 accessSize);
+bool IsOptimizableGatherPipeWrite(u32 address);
 
 }  // namespace