MMU: on DSI exception, don't set store bit in DSISR on read #12277
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Due to a bug introduced when refactoring in 2015 (commit 821db97), the store bit in DSISR is set incorrectly when the faulting address is non-zero, and not on a write.
I assume this wasn't noticed due to the parameter actually being used in the log for when the MMU is disabled.
This is a single-line fix, so again I feel a PR is more appropriate than a bug report.