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[AArch64] Optimization in the dispatcher. #1724

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Sonicadvance1
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Align our dispatcher to a page so we can jump to it with a ADRP+BR pair instead of ADRP+ADD+BR.
Also make sure to save /all/ of our callee saved registers that we are supposed to save.
Requires PR #1705 prior to merging.

@FioraAeterna
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03:46 @fiora HdkR: maybe regs_to_save should be a global define like x86 uses?
03:46 @fiora instead of a mysterious hex constant

@Sonicadvance1
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Did i!

@FioraAeterna
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Not to nitpick too much, but shouldn't it be a global constant? As in, we'll probably need it elsewhere much like x86's JIT ended up needing it

@Sonicadvance1
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The only time I need to unconditionally flush all the callee saved registers is in the dispatcher.
The other places are all handled by the register cache

@unknownbrackets
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What if there's a vertexjit, or etc.?

Well, in ppsspp we save individually based on what regs we use anyway, but something like ABI_PushAllCalleeSavedRegsAndAdjustStack() isn't horrible to have also for ARM, imho (although the name is way too long.)

-[Unknown]

@Sonicadvance1
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Currently the chance of having an AArch64 vertex JIT is very low.
I'm sure once I implement it in a year or two I can rearrange the code there.

Align our dispatcher to a page so we can jump to it with a ADRP+BR pair instead of ADRP+ADD+BR.
Also make sure to save /all/ of our callee saved registers that we are supposed to save.
Requires PR dolphin-emu#1705 prior to merging.
Sonicadvance1 added a commit that referenced this pull request Dec 22, 2014
…zation

[AArch64] Optimization in the dispatcher.
@Sonicadvance1 Sonicadvance1 merged commit 5cf79fd into dolphin-emu:master Dec 22, 2014
@Sonicadvance1 Sonicadvance1 deleted the AArch64_dispatcher_optimization branch December 22, 2014 02:08
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