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Jit64: make use of ANDN again #2848

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merged 2 commits into from Aug 14, 2015
Merged

Jit64: make use of ANDN again #2848

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5e9fe4c
x64Emitter: check for immediates in BMI ops
Tilka Aug 14, 2015
e5a2334
Jit64: make use of ANDN again
Tilka Aug 14, 2015
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4 changes: 3 additions & 1 deletion Source/Core/Common/x64Emitter.cpp
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Expand Up @@ -1447,8 +1447,10 @@ void XEmitter::WriteFMA4Op(u8 op, X64Reg dest, X64Reg regOp1, X64Reg regOp2, con
void XEmitter::WriteBMIOp(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, const OpArg& arg, int extrabytes)
{
CheckFlags();
if (arg.IsImm())
PanicAlert("BMI1/2 instructions don't support immediate operands.");
if (size != 32 && size != 64)
PanicAlert("VEX GPR instructions only support 32-bit and 64-bit modes!");
PanicAlert("BMI1/2 instructions only support 32-bit and 64-bit modes!");
int W = size == 64;
WriteVEXOp(opPrefix, op, regOp1, regOp2, arg, W, extrabytes);
}
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19 changes: 15 additions & 4 deletions Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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Expand Up @@ -676,7 +676,11 @@ void Jit64::boolX(UGeckoInstruction inst)
}
else if (inst.SUBOP10 == 60) // andcx
{
if (a == b)
if (cpu_info.bBMI1 && gpr.R(b).IsSimpleReg() && !gpr.R(s).IsImm())
{
ANDN(32, gpr.RX(a), gpr.RX(b), gpr.R(s));
}
else if (a == b)
{
NOT(32, gpr.R(a));
AND(32, gpr.R(a), operand);
Expand Down Expand Up @@ -745,9 +749,16 @@ void Jit64::boolX(UGeckoInstruction inst)
}
else if (inst.SUBOP10 == 60) // andcx
{
MOV(32, gpr.R(a), gpr.R(b));
NOT(32, gpr.R(a));
AND(32, gpr.R(a), gpr.R(s));
if (cpu_info.bBMI1 && gpr.R(b).IsSimpleReg() && !gpr.R(s).IsImm())
{
ANDN(32, gpr.RX(a), gpr.RX(b), gpr.R(s));
}
else
{
MOV(32, gpr.R(a), gpr.R(b));
NOT(32, gpr.R(a));
AND(32, gpr.R(a), gpr.R(s));
}
}
else if (inst.SUBOP10 == 444) // orx
{
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