Runtime_and_System_Optimization

2020.1 Vitis™ - Runtime and System Optimization Tutorials See Vitis™ Development Environment on xilinx.com

Design Tutorials

The methodology for developing optimized accelerated applications is comprised of two major phases: architecting the application, and developing the hardware kernels. In the first phase, you make key decisions about the application architecture by determining which software functions should be accelerated onto FPGA kernels, how much parallelism can be achieved, and how to deliver it in code. In the second phase, you implement the kernels by structuring the source code, and applying the necessary compiler options and pragmas to create the kernel architecture needed to achieve the optimized performance target. The following examples illustrate the use of this methodology in real-world applications.

Tutorial	Description
XRT Host Code Optimization	This tutorial demonstrates how to optimize your CPU host code to get the most out of interaction between your hardware accelerators and your runtime software.
Streaming Video Analytics with IVAS	This tutorial demonstrates a reference platform using the Xilinx IVAS framework for streaming video analytics with Vitis and Vitis AI 1.2.

Feature Tutorials

Tutorial	Description
Using Multiple DDR Banks	This tutorial demonstrates how using multiple DDRs can improve data transfer between kernels and global memory.
Using Multiple Compute Units	This tutorial demonstrates the flexible kernel linking process to increase the number of kernel instances on an FPGA, which improves the parallelism in a combined host-kernel system.
Controlling Vivado Implementation	This tutorial demonstrates how you can control the Vivado® tools flow when implementing your project.

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