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unwinder.cpp
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unwinder.cpp
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// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.
//
#include "stdafx.h"
#include "utilcode.h"
#include "crosscomp.h"
#include "unwinder.h"
#define NOTHING
#define ARM64_CONTEXT T_CONTEXT
#ifndef HOST_ARM64
#define CONTEXT T_CONTEXT
#define PCONTEXT PT_CONTEXT
#define KNONVOLATILE_CONTEXT_POINTERS T_KNONVOLATILE_CONTEXT_POINTERS
#define PKNONVOLATILE_CONTEXT_POINTERS PT_KNONVOLATILE_CONTEXT_POINTERS
#define RUNTIME_FUNCTION T_RUNTIME_FUNCTION
#define PRUNTIME_FUNCTION PT_RUNTIME_FUNCTION
#endif
#ifndef __in
#define __in _In_
#define __out _Out_
#endif
#ifndef FIELD_OFFSET
#define FIELD_OFFSET(type, field) ((LONG)__builtin_offsetof(type, field))
#endif
#ifdef HOST_UNIX
#define RtlZeroMemory ZeroMemory
typedef enum ARM64_FNPDATA_FLAGS {
PdataRefToFullXdata = 0,
PdataPackedUnwindFunction = 1,
PdataPackedUnwindFragment = 2,
} ARM64_FNPDATA_FLAGS;
typedef enum ARM64_FNPDATA_CR {
PdataCrUnchained = 0,
PdataCrUnchainedSavedLr = 1,
PdataCrChainedWithPac = 2,
PdataCrChained = 3,
} ARM64_FNPDATA_CR;
#endif // HOST_UNIX
//
// MessageId: STATUS_BAD_FUNCTION_TABLE
//
// MessageText:
//
// A malformed function table was encountered during an unwind operation.
//
#define STATUS_BAD_FUNCTION_TABLE ((NTSTATUS)0xC00000FFL)
//
// Flags for RtlVirtualUnwind2.
//
#define RTL_VIRTUAL_UNWIND2_VALIDATE_PAC 0x00000001UL
typedef struct _ARM64_KTRAP_FRAME {
//
// Exception active indicator.
//
// 0 - interrupt frame.
// 1 - exception frame.
// 2 - service frame.
//
/* +0x000 */ UCHAR ExceptionActive; // always valid
/* +0x001 */ UCHAR ContextFromKFramesUnwound; // set if KeContextFromKFrames created this frame
/* +0x002 */ UCHAR DebugRegistersValid; // always valid
/* +0x003 */ union {
UCHAR PreviousMode; // system services only
UCHAR PreviousIrql; // interrupts only
};
//
// Page fault information (page faults only)
// Previous trap frame address (system services only)
//
// Organized this way to allow first couple words to be used
// for scratch space in the general case
//
/* +0x004 */ ULONG FaultStatus; // page faults only
/* +0x008 */ union {
ULONG64 FaultAddress; // page faults only
ULONG64 TrapFrame; // system services only
};
//
// The ARM architecture does not have an architectural trap frame. On
// an exception or interrupt, the processor switches to an
// exception-specific processor mode in which at least the LR and SP
// registers are banked. Software is responsible for preserving
// registers which reflect the processor state in which the
// exception occurred rather than any intermediate processor modes.
//
//
// Volatile floating point state is dynamically allocated; this
// pointer may be NULL if the FPU was not enabled at the time the
// trap was taken.
//
/* +0x010 */ PVOID VfpState;
//
// Debug registers
//
/* +0x018 */ ULONG Bcr[ARM64_MAX_BREAKPOINTS];
/* +0x038 */ ULONG64 Bvr[ARM64_MAX_BREAKPOINTS];
/* +0x078 */ ULONG Wcr[ARM64_MAX_WATCHPOINTS];
/* +0x080 */ ULONG64 Wvr[ARM64_MAX_WATCHPOINTS];
//
// Volatile registers X0-X17, and the FP, SP, LR
//
/* +0x090 */ ULONG Spsr;
/* +0x094 */ ULONG Esr;
/* +0x098 */ ULONG64 Sp;
/* +0x0A0 */ ULONG64 X[19];
/* +0x138 */ ULONG64 Lr;
/* +0x140 */ ULONG64 Fp;
/* +0x148 */ ULONG64 Pc;
/* +0x150 */
} ARM64_KTRAP_FRAME, *PARM64_KTRAP_FRAME;
typedef struct _ARM64_VFP_STATE
{
struct _ARM64_VFP_STATE *Link; // link to next state entry
ULONG Fpcr; // FPCR register
ULONG Fpsr; // FPSR register
NEON128 V[32]; // All V registers (0-31)
} ARM64_VFP_STATE, *PARM64_VFP_STATE, KARM64_VFP_STATE, *PKARM64_VFP_STATE;
#define RTL_VIRTUAL_UNWIND_VALID_FLAGS_ARM64 (RTL_VIRTUAL_UNWIND2_VALIDATE_PAC)
//
// Parameters describing the unwind codes.
//
#define STATUS_UNWIND_UNSUPPORTED_VERSION STATUS_UNSUCCESSFUL
#define STATUS_UNWIND_NOT_IN_FUNCTION STATUS_UNSUCCESSFUL
#define STATUS_UNWIND_INVALID_SEQUENCE STATUS_UNSUCCESSFUL
//
// Macros for accessing memory. These can be overridden if other code
// (in particular the debugger) needs to use them.
//
//
// Macros for accessing memory. These can be overridden if other code
// (in particular the debugger) needs to use them.
#if !defined(DEBUGGER_UNWIND)
#define MEMORY_READ_BYTE(params, addr) (*dac_cast<PTR_BYTE>(addr))
#define MEMORY_READ_WORD(params, addr) (*dac_cast<PTR_WORD>(addr))
#define MEMORY_READ_DWORD(params, addr) (*dac_cast<PTR_DWORD>(addr))
#define MEMORY_READ_QWORD(params, addr) (*dac_cast<PTR_UINT64>(addr))
#endif
//
// ARM64_UNWIND_PARAMS definition. This is the kernel-specific definition,
// and contains information on the original PC, the stack bounds, and
// a pointer to the non-volatile context pointer array. Any usage of
// these fields must be wrapped in a macro so that the debugger can take
// a direct drop of this code and use it.
//
#if !defined(DEBUGGER_UNWIND)
typedef struct _ARM64_UNWIND_PARAMS
{
ULONG_PTR ControlPc;
PULONG_PTR LowLimit;
PULONG_PTR HighLimit;
PKNONVOLATILE_CONTEXT_POINTERS ContextPointers;
} ARM64_UNWIND_PARAMS, *PARM64_UNWIND_PARAMS;
#define UNWIND_PARAMS_SET_TRAP_FRAME(Params, Address, Size)
#if !defined(UPDATE_CONTEXT_POINTERS)
#define UPDATE_CONTEXT_POINTERS(Params, RegisterNumber, Address) \
do { \
PKNONVOLATILE_CONTEXT_POINTERS ContextPointers = (Params)->ContextPointers; \
if (ARGUMENT_PRESENT(ContextPointers)) { \
if (RegisterNumber >= 19 && RegisterNumber <= 28) { \
(&ContextPointers->X19)[RegisterNumber - 19] = (PULONG64)Address; \
} else if (RegisterNumber == 29) { \
ContextPointers->Fp = (PULONG64)Address; \
} else if (RegisterNumber == 30) { \
ContextPointers->Lr = (PULONG64)Address; \
} \
} \
} while (0)
#endif // !defined(UPDATE_CONTEXT_POINTERS)
#if !defined(UPDATE_FP_CONTEXT_POINTERS)
#define UPDATE_FP_CONTEXT_POINTERS(Params, RegisterNumber, Address) \
do { \
PKNONVOLATILE_CONTEXT_POINTERS ContextPointers = (Params)->ContextPointers; \
if (ARGUMENT_PRESENT(ContextPointers) && \
(RegisterNumber >= 8) && \
(RegisterNumber <= 15)) { \
\
(&ContextPointers->D8)[RegisterNumber - 8] = (PULONG64)Address; \
} \
} while (0)
#endif // !defined(UPDATE_FP_CONTEXT_POINTERS)
#if !defined(VALIDATE_STACK_ADDRESS_EX)
#define VALIDATE_STACK_ADDRESS_EX(Params, Context, Address, DataSize, Alignment, OutStatus)
#endif // !defined(VALIDATE_STACK_ADDRESS_EX)
#if !defined(VALIDATE_STACK_ADDRESS)
#define VALIDATE_STACK_ADDRESS(Params, Context, DataSize, Alignment, OutStatus) \
VALIDATE_STACK_ADDRESS_EX(Params, Context, (Context)->Sp, DataSize, Alignment, OutStatus)
#endif // !defined(VALIDATE_STACK_ADDRESS)
#else // !defined(DEBUGGER_UNWIND)
#if !defined(UPDATE_CONTEXT_POINTERS)
#define UPDATE_CONTEXT_POINTERS(Params, RegisterNumber, Address)
#endif // !defined(UPDATE_CONTEXT_POINTERS)
#if !defined(UPDATE_FP_CONTEXT_POINTERS)
#define UPDATE_FP_CONTEXT_POINTERS(Params, RegisterNumber, Address)
#endif // !defined(UPDATE_FP_CONTEXT_POINTERS)
#if !defined(VALIDATE_STACK_ADDRESS_EX)
#define VALIDATE_STACK_ADDRESS_EX(Params, Context, Address, DataSize, Alignment, OutStatus)
#endif // !defined(VALIDATE_STACK_ADDRESS_EX)
#if !defined(VALIDATE_STACK_ADDRESS)
#define VALIDATE_STACK_ADDRESS(Params, Context, DataSize, Alignment, OutStatus)
#endif // !defined(VALIDATE_STACK_ADDRESS)
#endif // !defined(DEBUGGER_UNWIND)
//
// Macros for stripping pointer authentication (PAC) bits.
//
#if !defined(DEBUGGER_STRIP_PAC)
// NOTE: Pointer authentication is not used by .NET, so the implementation does nothing
#define STRIP_PAC(Params, pointer)
#endif
//
// Macros to clarify opcode parsing
//
#define OPCODE_IS_END(Op) (((Op) & 0xfe) == 0xe4)
//
// This table describes the size of each unwind code, in bytes, for unwind codes
// in the range 0xE0-0xFF.
//
static const BYTE UnwindCodeSizeTable[32] =
{
4,1,2,1,1,1,1,3, 1,1,1,1,1,1,1,1, 1,1,1,1,1,1,1,1, 2,3,4,5,1,1,1,1
};
//
// This table describes the number of instructions represented by each unwind
// code in the range 0xE0-0xFF.
//
static const BYTE UnwindCodeInstructionCountTable[32] =
{
1,1,1,1,1,1,1,1, // 0xE0-0xE7
0, // 0xE8 - MSFT_OP_TRAP_FRAME
0, // 0xE9 - MSFT_OP_MACHINE_FRAME
0, // 0xEA - MSFT_OP_CONTEXT
0, // 0xEB - MSFT_OP_EC_CONTEXT / MSFT_OP_RET_TO_GUEST (unused)
0, // 0xEC - MSFT_OP_CLEAR_UNWOUND_TO_CALL
0, // 0XED - MSFT_OP_RET_TO_GUEST_LEAF (unused)
0,0, // 0xEE-0xEF
0,0,0,0,0,0,0,0, // 0xF0-0xF7
1,1,1,1,1,1,1,1 // 0xF8-0xFF
};
#if !defined(ALIGN_DOWN_BY)
#define ALIGN_DOWN_BY(length, alignment) \
((ULONG_PTR)(length) & ~((ULONG_PTR)(alignment) - 1))
#endif
#if !defined(ALIGN_UP_BY)
#define ALIGN_UP_BY(length, alignment) \
(ALIGN_DOWN_BY(((ULONG_PTR)(length) + (alignment) - 1), alignment))
#endif
#define OP_BUFFER_PRE_ADJUST(_sav_slot, _slots) {}
#define OP_BUFFER_POST_ADJUST(_sav_slot, _slots) {(_sav_slot) += (_slots);}
#define DBG_OP(...)
#pragma warning(push)
#pragma warning(disable:4214) // bit field types other than int
#pragma warning(disable:4201) // nameless struct/union
#pragma warning(disable:4309) // truncation of constant value
#ifdef __clang__
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wbitfield-constant-conversion"
#endif
void emit_save_fplr(char** buff, LONG offset) {
union uop {
char val;
struct {
char z : 6; // pair at[sp + #Z * 8], offset <= 504
char fixed : 2;
};
};
union uop *op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
offset = ((offset)/8);
op = (union uop*)(*buff);
op->fixed = 1;
op->z = (char)offset;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
void emit_save_fplr_x(char** buff, LONG offset) {
union uop {
char val;
struct {
char z : 6; // pair at [sp-(#Z+1)*8]!, pre-indexed offset >= -512
char fixed : 2;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
offset = ((-offset)/8)-1;
op = (union uop*)(*buff);
op->fixed = 2;
op->z = (char)offset;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
void emit_save_regp(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 4; // save r(19 + #X) pair at[sp + #Z * 8], offset <= 504
short fixed : 6;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((offset)/8);
op = (union uop*)(*buff);
op->fixed = 0x32;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_regp_x(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 4; // save pair r(19+#X) at [sp-(#Z+1)*8]!, pre-indexed offset >= -512
short fixed : 6;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((-offset)/8)-1;
op = (union uop*)(*buff);
op->fixed = 0x33;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_reg(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 4; // save reg r(19+#X) at [sp+#Z*8], offset <= 504
short fixed : 6;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((offset)/8);
op = (union uop*)(*buff);
op->fixed = 0x34;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_reg_x(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 5;
short x : 4; // save reg r(19+#X) at [sp-(#Z+1)*8]!, pre-indexed offset >= -256
short fixed : 7;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((-offset)/8)-1;
op = (union uop*)(*buff);
op->fixed = 0x6A;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_lrpair(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 3; // save pair <r(19+2*#X),lr> at [sp+#Z*8], offset <= 504
short fixed : 7;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((offset)/8);
op = (union uop*)(*buff);
op->fixed = 0x6B;
op->x = (short)(reg / 2);
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_fregp(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 3; // save pair d(8+#X) at [sp+#Z*8], offset <= 504
short fixed : 7;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((offset)/8);
op = (union uop*)(*buff);
op->fixed = 0x6C;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_fregp_x(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 3; // save pair d(8 + #X), at[sp - (#Z + 1) * 8]!, pre - indexed offset >= -512
short fixed : 7;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((-offset)/8)-1;
op = (union uop*)(*buff);
op->fixed = 0x6D;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_freg(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 6;
short x : 3; // save reg d(8+#X) at [sp+#Z*8], offset <= 504
short fixed : 7;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((offset)/8);
op = (union uop*)(*buff);
op->fixed = 0x6E;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_save_freg_x(char** buff, LONG reg, LONG offset) {
union uop {
short val;
struct {
short z : 5;
short x : 3; // save reg d(8+#X) at [sp-(#Z+1)*8]!, pre-indexed offset >= -256
short fixed : 8;
};
};
union uop* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
offset = ((-offset)/8)-1;
op = (union uop*)(*buff);
op->fixed = 0xDE;
op->x = (short)reg;
op->z = (short)offset;
OP_BUFFER_POST_ADJUST(*buff, 2);
}
void emit_alloc(char** buff, LONG size) {
union uop_alloc_l {
long val;
struct {
long x : 24; // allocate large stack with size < 256M (2^24 *16)
long fixed : 8;
};
};
union uop_alloc_m {
short val;
struct {
short x : 11; // allocate large stack with size < 32K (2^11 * 16)
short fixed : 5;
};
};
union uop_alloc_s {
char val;
struct {
char x : 5; // allocate small stack with size < 512 (2^5 * 16)
char fixed : 3;
};
};
if (size >= 16384) {
union uop_alloc_l* op;
OP_BUFFER_PRE_ADJUST(*buff, 4);
op = (union uop_alloc_l*)(*buff);
op->fixed = 0xE0;
op->x = size / 16;
OP_BUFFER_POST_ADJUST(*buff, 4);
}
else if (size >= 512) {
union uop_alloc_m* op;
OP_BUFFER_PRE_ADJUST(*buff, 2);
op = (union uop_alloc_m*)(*buff);
op->fixed = 0x18;
op->x = (short)(size / 16);
OP_BUFFER_POST_ADJUST(*buff, 2);
}
else {
union uop_alloc_s* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
op = (union uop_alloc_s*)(*buff);
op->fixed = 0x0;
op->x = (char)(size / 16);
OP_BUFFER_POST_ADJUST(*buff, 1);
}
}
void emit_end(char** buff) {
char* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
op = (char*)(*buff);
*op = 0xE4;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
void emit_end_c(char** buff) {
char* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
op = (char*)(*buff);
*op = 0xE5;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
void emit_set_fp(char** buff) {
char* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
op = (char*)(*buff);
*op = 0xE1;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
void emit_nop(char** buff) {
char* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
op = (char*)(*buff);
*op = 0xE3;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
void emit_pac(char** buff) {
char* op;
OP_BUFFER_PRE_ADJUST(*buff, 1);
op = (char*)(*buff);
*op = 0xFC;
OP_BUFFER_POST_ADJUST(*buff, 1);
}
#ifdef __clang__
#pragma clang diagnostic pop
#endif
#pragma warning(pop)
#define NO_HOME_NOPS ((size_t)-1)
VOID
RtlpExpandCompactToFull (
_In_ IMAGE_ARM64_RUNTIME_FUNCTION_ENTRY* fnent_pdata,
_Inout_ IMAGE_ARM64_RUNTIME_FUNCTION_ENTRY_XDATA* fnent_xdata
)
{
LONG intsz;
LONG fpsz;
LONG savsz;
LONG locsz;
LONG famsz;
BOOLEAN sav_predec_done = FALSE;
BOOLEAN fp_set = FALSE;
LONG sav_slot = 0;
char* op_buffer;
char* op_buffer_start;
char* op_buffer_end;
size_t op_buffer_used;
size_t ops_before_nops = NO_HOME_NOPS;
//
// Calculate sizes.
//
famsz = fnent_pdata->FrameSize * 2;
intsz = fnent_pdata->RegI;
if (fnent_pdata->CR == PdataCrUnchainedSavedLr) {
intsz += 1; // lr
}
fpsz = fnent_pdata->RegF;
if (fnent_pdata->RegF != 0) {
fpsz += 1;
}
savsz = intsz + fpsz;
//
// Usually Homes are saved as part of the savesz area.
// In other words, they are saved in the space allocated
// by the pre-decrement operation performed by a non-volatile
// register save. If there are no non-volatile register saves,
// then Homes are saved in the localsz area.
//
if (savsz > 0) {
savsz += (fnent_pdata->H * 8);
}
savsz = ALIGN_UP_BY(savsz, 2);
locsz = famsz - savsz;
//
// Initialize xdata main header.
//
fnent_xdata->FunctionLength = fnent_pdata->FunctionLength;
fnent_xdata->Version = 0;
fnent_xdata->ExceptionDataPresent = 0;
op_buffer_start = (char*)(fnent_xdata + 1);
op_buffer_end = op_buffer_start + ((fnent_xdata->CodeWords) * 4);
op_buffer = op_buffer_start;
DBG_OP("end\n");
emit_end(&op_buffer);
if (fnent_pdata->CR == PdataCrChainedWithPac) {
DBG_OP("pac\n");
emit_pac(&op_buffer);
}
//
// Save the integer registers.
//
if (intsz != 0) {
ULONG intreg;
//
// Special case for only x19 + LR, for which an _x option is not
// available, so do the SP decrement by itself first.
//
if ((fnent_pdata->RegI == 1) && (fnent_pdata->CR == PdataCrUnchainedSavedLr)) {
DBG_OP("alloc_s (%i)\n", savsz * 8);
emit_alloc(&op_buffer, savsz * 8);
sav_predec_done = TRUE;
}
//
// Issue save-pair instructions as long as there are even number
// or registers to lave left.
//
for (intreg = 0; intreg < ((fnent_pdata->RegI / 2) * 2); intreg += 2) {
if (!sav_predec_done) {
DBG_OP("save_regp_x\t(%s, %s, %i)\n", int_reg_names[intreg], int_reg_names[intreg + 1], -savsz * 8);
emit_save_regp_x(&op_buffer, intreg, -savsz * 8);
sav_slot += 2;
sav_predec_done = TRUE;
}
else {
DBG_OP("save_regp\t(%s, %s, %i)\n", int_reg_names[intreg], int_reg_names[intreg + 1], sav_slot * 8);
emit_save_regp(&op_buffer, intreg, sav_slot * 8);
sav_slot += 2;
}
}
//
// Address the remaining possible cases:
// - Last remaining odd register
// - LR, when CR=1 (saving LR needed but no FP chain)
// - Both, as a pair
//
if ((fnent_pdata->RegI % 2) == 1) {
if (fnent_pdata->CR == PdataCrUnchainedSavedLr) {
//
// special case at the top of the function makes sure
// !sav_predec_done can't even happen.
//
_ASSERTE(sav_predec_done);
DBG_OP("save_lrpair\t(%s, %i)\n", int_reg_names[intreg], sav_slot * 8);
emit_save_lrpair(&op_buffer, intreg, sav_slot * 8);
sav_slot += 2;
}
else {
if (!sav_predec_done) {
DBG_OP("save_reg_x\t(%s, %i)\n", int_reg_names[intreg], -savsz * 8);
emit_save_reg_x(&op_buffer, intreg, -savsz * 8);
sav_slot += 1;
sav_predec_done = TRUE;
}
else {
DBG_OP("save_reg\t(%s, %i)\n", int_reg_names[intreg], sav_slot * 8);
emit_save_reg(&op_buffer, intreg, sav_slot * 8);
sav_slot += 1;
}
}
}
else {
if (fnent_pdata->CR == PdataCrUnchainedSavedLr) {
if (!sav_predec_done) {
DBG_OP("save_reg_x\t(%s, %i)\n", int_reg_names[11], -savsz * 8);
emit_save_reg_x(&op_buffer, 11, -savsz * 8);
sav_slot += 1;
sav_predec_done = TRUE;
}
else {
DBG_OP("save_reg\t(%s, %i)\n", int_reg_names[11], sav_slot * 8);
emit_save_reg(&op_buffer, 11, sav_slot * 8);
sav_slot += 1;
}
}
}
}
//
// Save the floating point registers.
//
if (fpsz != 0) {
LONG fpreg;
for (fpreg = 0; fpreg < ((fpsz / 2) * 2); fpreg += 2) {
if (!sav_predec_done) {
DBG_OP("save_fregp_x\t(%s, %s, %i)\n", fp_reg_names[fpreg], fp_reg_names[fpreg + 1], -savsz * 8);
emit_save_fregp_x(&op_buffer, fpreg, -savsz * 8);
sav_slot += 2;
sav_predec_done = TRUE;
}
else {
DBG_OP("save_fregp\t(%s, %s, %i)\n", fp_reg_names[fpreg], fp_reg_names[fpreg + 1], sav_slot * 8);
emit_save_fregp(&op_buffer, fpreg, sav_slot * 8);
sav_slot += 2;
}
}
if ((fpsz % 2) == 1) {
if (!sav_predec_done) {
DBG_OP("save_freg_x\t(%s, %i)\n", fp_reg_names[fpreg], -savsz * 8);
emit_save_freg_x(&op_buffer, fpreg, -savsz * 8);
sav_slot += 1;
sav_predec_done = TRUE;
}
else {
DBG_OP("save_freg\t(%s, %i)\n", fp_reg_names[fpreg], sav_slot * 8);
emit_save_freg(&op_buffer, fpreg, sav_slot * 8);
sav_slot += 1;
}
}
}
//
// Save parameter registers. Record the instructions
// that save them, if Homes are being saved into the
// savesz area. If they are being saved into the localsz
// area, then they don't realy need to be indicated since
// they are no-ops and there is nothing following them.
// In that case, the Homes save instructions will just
// be considered part of the body.
//
if ((fnent_pdata->H != 0) && sav_predec_done) {
ops_before_nops = op_buffer - op_buffer_start;
DBG_OP("nop\nnop\nnop\nnop\n");
emit_nop(&op_buffer);
emit_nop(&op_buffer);
emit_nop(&op_buffer);
emit_nop(&op_buffer);
}
//
// Reserve space for locals and fp,lr chain.
//
if (locsz > 0) {
if ((fnent_pdata->CR == PdataCrChained) ||
(fnent_pdata->CR == PdataCrChainedWithPac)) {
if (locsz <= (512 / 8)) {
DBG_OP("save_fplr_x\t(%i)\n", -locsz * 8);
emit_save_fplr_x(&op_buffer, -locsz * 8);
}
else {
DBG_OP("alloc\t\t(%i)\n", locsz * 8);
emit_alloc(&op_buffer, locsz * 8);
DBG_OP("save_fplr\t(%i)\n", 0);
emit_save_fplr(&op_buffer, 0);
}
DBG_OP("set_fp\n");
emit_set_fp(&op_buffer);
fp_set = TRUE;
}
else {
DBG_OP("alloc\t\t(%i)\n", locsz * 8);
emit_alloc(&op_buffer, locsz * 8);
}
}
if (fnent_pdata->Flag == PdataPackedUnwindFragment) {
DBG_OP("end_c\n");
emit_end_c(&op_buffer);
}
//
// Adjust epilog information in the header
//
if (fnent_pdata->Flag == PdataPackedUnwindFragment) {
//
// Fragment case: no epilog
//
fnent_xdata->EpilogInHeader = 0;
fnent_xdata->EpilogCount = 0;
}
else {
//
// With EpilogInHeader true, EpilogCount represents
// the op index to the start of the epilog. If the
// set_fp is present in the prolog, set this field
// to 1 so that this op is skipped for the epilog.
//
fnent_xdata->EpilogInHeader = 1;
if (fp_set) {
fnent_xdata->EpilogCount = 1;
}
else {
fnent_xdata->EpilogCount = 0;
}
}
//
// Flip the buffer around. This will acomplish two
// needed things:
// - Opcodes closer to the body show first;
// - Opcodes become big-endian, as they should.
//
op_buffer_used = op_buffer - op_buffer_start;
if (op_buffer_used > 1) {
char* lo = op_buffer_start;
char* hi = op_buffer - 1;
char swap;
while (lo < hi) {
swap = *lo;
*lo++ = *hi;
*hi-- = swap;
}
}