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Consider implementing register-specific write barriers for non-x86 platforms #13250

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BruceForstall opened this issue Aug 12, 2019 · 0 comments
Open

Consider implementing register-specific write barriers for non-x86 platforms #13250

BruceForstall opened this issue Aug 12, 2019 · 0 comments
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area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI JitUntriaged CLR JIT issues needing additional triage optimization
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Future

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@BruceForstall
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x86 has a write barrier helper for each possible source register. This means we can avoid moving the source register to a different, argument register when generating code for the write barrier, possibly improving register allocation (and maybe reducing callee-saved register usage) and reducing code size.

Consider adding these optimized write barriers for x64, as well as non-xarch platforms.

category:cq
theme:barriers
skill-level:expert
cost:medium
@msftgits msftgits transferred this issue from dotnet/coreclr Jan 31, 2020
@msftgits msftgits added this to the Future milestone Jan 31, 2020
@BruceForstall BruceForstall added the JitUntriaged CLR JIT issues needing additional triage label Oct 28, 2020
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